參數(shù)資料
型號: UPD44325364F5-E40-EQ2
廠商: NEC Corp.
英文描述: CABLE ASSEMBLY; LEAD-FREE SOLDER; SMA MALE TO SMA MALE; 50 OHM, RG142B/U COAX, DOUBLE SHIELDED
中文描述: 36M條位推出QDRII SRAM的4個字爆發(fā)運作
文件頁數(shù): 13/36頁
文件大小: 377K
代理商: UPD44325364F5-E40-EQ2
13
Preliminary Data Sheet
M16784EJ1V0DS
μ
PD44325084, 44325094, 44325184, 44325364
Bus Cycle State Diagram
READ DOUBLE;
R_Count = R_Count+2
WRITE DOUBLE;
W_Count = W_Count+2
Power UP
Always
/R = H
Supply voltage
provided
LOAD NEW
READ ADDRESS;
R_Count = 0;
R_Init = 1
READ PORT NOP
R_Init = 0
/R = L & R_Count = 4
/W = H
WRITE PORT NOP
LOAD NEW
WRITE ADDRESS;
W_Count = 0
Always
/W = L & W_Count = 4
/W = L
R_Init = 0
/R = L
Supply voltage
provided
INCREMENT READ
ADDRESS BY TWO
R_Init = 0
INCREMENT WRITE
ADDRESS BY TWO
W_Count = 2
R_Count = 2
Always
Always
/W = H
& W_Count = 4
/R = H
& R_Count = 4
Remarks 1.
The address is concatenated with two additional internal LSBs to facilitate burst operation.
The address order is always fixed as: xxx...xxx+0, xxx...xxx+1, xxx...xxx+2, xxx...xxx+3.
Bus cycle is terminated at the end of this sequence (burst count = 4).
2.
Read and write state machines can be active simultaneously.
Read and write cannot be simultaneously initiated. Read takes precedence.
3.
State machine control timing is controlled by K.
相關PDF資料
PDF描述
UPD44325084F5-E40-EQ2 36M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44325184F5-E40-EQ2 36M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44325084F5-E50-EQ2 36M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44325184F5-E50-EQ2 36M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44325094F5-E40-EQ2 36M-BIT QDRII SRAM 4-WORD BURST OPERATION
相關代理商/技術參數(shù)
參數(shù)描述
UPD444001LE-12-A 制造商:Renesas Electronics 功能描述:12ns 制造商:Renesas Electronics 功能描述:12ns Cut Tape
UPD444004LE-12-A 制造商:Renesas Electronics Corporation 功能描述:
UPD444008LE-12-A 制造商:Renesas Electronics 功能描述:12ns 5V Cut Tape
UPD444008LLE-A10(A) 制造商:Renesas Electronics Corporation 功能描述:
UPD444008LLE-A12-A 制造商:Renesas Electronics 功能描述:12ns 3.3V Cut Tape