參數(shù)資料
型號: UPD178076
廠商: NEC Corp.
元件分類: 8位微控制器
英文描述: 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述: 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁數(shù): 49/72頁
文件大小: 366K
代理商: UPD178076
49
μ
PD178076,178078,178096,178098
Data Sheet U12885EJ3V0DS00
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Low-level input
leakage current
I
LIL
P00-P07, P10-P17,
P20-P27, P30-P37,
P40-P47, P50-P57,
P60-P67, P70-P77,
P100-P102, P120-P124,
RESET
V
I
= 0 V
–3
μ
A
I
LOH1
P130-P137
V
O
= 15 V
–3
μ
A
I
LOL1
P130-P137
V
O
= 0 V
3
μ
A
I
LOH2
P25-P27
(at N-ch open drain I/O)
V
O
= V
DD
–3
μ
A
I
LOL2
P25-P27
(at N-ch open drain I/O)
V
O
= 0 V
3
μ
A
I
LOH3
EO0, EO1
V
O
= V
DD
–3
μ
A
I
LOL3
EO0, EO1
V
O
= 0 V
3
μ
A
Supply current
Note
I
DD1
fx = 4.5 MHz
(
μ
PD178076, 178078)
2.5
15
mA
I
DD2
fx = 6.3 MHz
(
μ
PD178076, 178078,
178096, 178098)
4.0
20
mA
I
DD3
fx = 4.5 MHz
(
μ
PD178076, 178078)
0.2
0.8
mA
I
DD4
fx = 6.3 MHz
(
μ
PD178076, 178078,
178096, 178098)
0.3
1.0
mA
V
DDR1
When crystal resonator is oscillating
3.5
5.5
V
V
DDR2
When crystal oscillation is
stopped
Power-failure detection
function
2.2
V
V
DDR3
Data memory retained
2.0
V
Data retention
current
I
DDR1
When crystal oscillation is
stopped
T
A
= 25
°
C,
V
DD
= 5 V
2.0
4.0
μ
A
I
DDR2
2.0
20
μ
A
DC Characteristics (T
A
= –40 to +85
°
C, V
DD
= 3.5 to 5.5 V)
Note
Excluding AV
DD
current and V
DD
PLL current.
Remarks 1.
f
X
: System clock oscillation frequency
2.
Unless otherwise specified, the characteristics of a multiplexed pin are the same as those of the
corresponding port pin.
Output off
leakage current
Data retention
voltage
When CPU is operating
and PLL is stopped.
Sine wave input to X1 pin
V
I
= V
DD
In HALT mode with PLL
stopped.
Sine wave input to X1 pin
V
I
= V
DD
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