參數(shù)資料
型號： UPD17201A
廠商： NEC Corp.
英文描述： 4-BIT SINGLE-CHIP MICROCONTROLLER WITH LCD CONTROLLER/DRIVER AND A/D CONVERTER FOR INFRARED REMOTE CONTROL TRANSMITTERS
中文描述： 4位單片機與LCD控制器/驅動器和A / D轉換器紅外遙控遞質
文件頁數(shù)： 81/120頁
文件大?。?/td> 516K
代理商： UPD17201A
μ
PD17201A, 17207
81
13.3
STOP MODE
In STOP mode, the
μ
PD17207 stops the execution of the program with the main clock temporarily off for great
reduction of its power dissipation. Execute a STOP instruction to set STOP mode.
The STOP instruction is not valid for a system using a subclock only. When the system uses a subclock as the
system clock (that is, when SYSCK = 0), the STOP instruction is treated as an NOP instruction.
The condition of releasing STOP mode is determined by the operand of the STOP instruction. See Table 13-4.
After STOP mode is released, the
μ
PD17207 performs operations as follows:
1
2
3
4
Clearing IRQTM
Starting watch timer and watchdog timer (not reset)
Resetting and starting 8-bit timer
The instruction following STOP 8H or the interrupt vector address is executed when the value of the 8-bit
counter coincides with the value of the modulo register (setting of IRQTM).
Caution When the subclock is used, the watch timer and watchdog timer do not stop even in the STOP
mode.
The time interval between release of STOP mode and start of the execution of the next instruction is set by the
contents of the modulo register of the 8-bit timer. This time interval is expressed as follows:
(TMM +1) x 1024/f
x
[sec]
where,
TMM :
Content of the modulo register
f
x
:
Frequency of the main clock.
Example:
In a system using the main clock of 4 MHz, the time interval between release of STOP mode and start
of the execution of the next instruction is:
(TMM + 1) x 256 [microseconds]
Caution Do not set an instruction that would clear the interrupt request flag (IRQxxx) whose interrupt
enable flag (IPxxx) is set immediately before the STOP 8H instruction, if you set such an
instruction, the STOP mode may not be set.
Table 13-4 STOP Mode Releasing Conditions
Operand Value
STOP Mode Releasing Condition
1000B
(08H)
1
When an interrupt request (IRQWTM, IRQSIO, or IRQ) is made for an interrupt
whose enable flag (IPWTM, IPSIO, or IP) is on (“1”)
When any of pins P0A
0
to P0A
3
goes low
2
Others
Inhibited
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