參數(shù)資料
型號: UPD16663
廠商: NEC Corp.
英文描述: 240-OUTPUT LCD COLUMN SEGMENT DRIVER WITH BUILT-IN RAM
中文描述: 240輸出LCD列段驅(qū)動,配有內(nèi)存
文件頁數(shù): 24/40頁
文件大小: 289K
代理商: UPD16663
Data Sheet S13392EJ1V0DS00
24
μ
PD16663
13. CHIPSET POWER APPLICATION
It is recommended that the power be applied to the chipset in the following order.
V
CC2
V
CC1
CPU interface
V
DD
, V
EE
V
1
, V
2
The LCD drive power supplies V
1
and V
2
must be applied last.
V
CC2
V
CC1
V
EE
Note 2
V
DD
Note 2
V
1
V
2
CPU Interface
Note 1
(A
0
to A
16
, /CS, /OE,
/WE, /UBE, D
0
to D
15
,
/DOFF)
OFF
OFF
OFF
OFF
OFF
OFF
0 V
0 V
ON
ON
4.5 V
ON
ON
ON
ON
3.3 V
3.3 V
/RESET
0.3V
CC2
0 s or
more
0 s or
more
0 s or
more
100 ns or
more
Notes1.
The select signals (PL0, PL1, DIR, MS, and BMODE) can be input at the same time as V
CC2
.
2.
V
DD
and V
EE
do not have to be ON at the same time. V
DD
and V
EE
are the row driver LCD power
supplies.
Caution Turn off the power of the chipset in the reverse order to the one above.
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