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參數(shù)資料
| 型號： | UPD161401W |
| 廠商： | NEC Corp. |
| 英文描述： | 256-COLOR, 1/80-DUTY LCD CONTROLLER/DRIVER WITH ON-CHIP RAM |
| 中文描述： | 256色，1/80-DUTY LCD控制器/驅(qū)動器，片內(nèi)RAM |
| 文件頁數(shù)： | 28/124頁 |
| 文件大小： | 647K |
| 代理商： | UPD161401W |
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Data Sheet S15726EJ2V0DS
28
μ
PD161401
5.2.6
Display data latch circuit
The display data latch circuit temporarily stores (latches) the display data that is output from the display data RAM to
the LCD driver circuit.
The display scan command for forwarding or reversing data and the display ON/OFF command control the latched
data and do not affect the data of the display data RAM.
5.2.7
With the
μ
PD161401, any area of the display RAM selected by the MIN.
X/Y address registers (R7 and R9) and
MAX.
X/Y address registers (R8 and R10) can be accessed.
First, select the area to be accessed by using the MIN.
X/Y address registers and MAX.
X/Y address registers. When
WAS of control register 1 is set to 1, the window access mode is then selected. The address scanning setting by INC,
XDIR, and YDIR of control register 2 (R1) is also valid in this mode, in the same manner as when data is normally
written to the display RAM. In addition, data can be written from any address by specifying the X address register (R4)
and Y address register (R5).
Note that the display RAM must be accessed after setting the X address register (R6) and Y address register (R7) if
the window access area has been set or changed by the MIN.
X/Y address register (R7, R9) or MAX.
X/Y address
register (R8, R10).
Arbitrary address area access (window access mode (WAS))
Figure 5
6. Example of Incrementing Address When INC = 0, XDIR = 0, and YDIR = 0
Start point
End point
4FH
00H
64H
00H
MIN..
MIN..
MAX..
MAX..
.
Cautions 1. When using the window access mode, the relationship between the start point and end point
shown in the table below must be established.
Item
Address Relation Ship
X address
00H
≤
MIN.
X address
≤
X address (R4)
≤
MAX.
X address
≤
64H
00H
≤
MIN.
Y address
≤
Y address (R5)
≤
MAX.
Y address
≤
4FH
Y address
2. If invalid address data is set as the MIN./MAX.
address, operation is not guaranteed.
3. Access the display RAM after setting the X address register (R6) and Y address register (R7) if the
window access area has been set or changed by the MIN.
X/Y address register (R7, R9) or
MAX.
X/Y address register (R8, R10).
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