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參數(shù)資料
| 型號(hào)： | UPA821TF |
| 廠商： | NEC Corp. |
| 英文描述： | NPN SILICON EPITAXIAL TWIN TRANSISTOR |
| 中文描述： | NPN硅外延雙晶體管 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 54K |
| 代理商： | UPA821TF |
UPA821TF
NPN SILICON EPITAXIAL
TWIN TRANSISTOR
LOW NOISE:
NF = 1.2 dB TYP at f = 1 GHz, V
CE
= 3 V, lc = 7 mA
HIGH GAIN:
|S
21E
|
2
= 9.0 dB TYP at f = 1 GHz, V
CE
= 3 V, lc = 7 mA
SMALL PACKAGE STYLE:
2 NE856 die in a 2 mm x 1.25 mm x 0.6 mm package
FEATURES
DESCRIPTION
The UPA821TF has two built-in low-voltage transistors which
are designed for low-noise amplification in the VHF to UHF
band. The two die are chosen from adjacent locations on the
wafer. These features combined with the pin configuration
make this device ideal for balanced or mirrored applications.
Low noise figures, high gain, and high current capability equate
to wide dynamic range and excellent linearity. The thinner
package style allows for higher density designs.
PRELIMINARY DATA SHEET
PART NUMBER
PACKAGE OUTLINE
UPA821TF
TS06
SYMBOLS
PARAMETERS AND CONDITIONS
UNITS
MIN
TYP
MAX
I
CBO
I
EBO
Collector Cutoff Current at V
CB
= 10 V, I
E
= 0
Emitter Cutoff Current at V
EB
= 1 V, I
C
= 0
DC Current Gain
1
at V
CE
= 3 V, I
C
= 7 mA
Gain Bandwidth at V
CE
= 3 V, I
C
= 7 mA
Feedback Capacitance
2
at V
CB
= 3 V, I
E
= 0, f = 1 MHz
Insertion Power Gain at V
CE
= 3 V, I
C
=7 mA, f = 1 GHz
Noise Figure at V
CE
= 3 V, I
C
= 7 mA, f = 1 GHz
μ
A
μ
A
1.0
1.0
140
h
FE
f
T
Cre
|S
21E
|
2
NF
70
3.0
GHz
pF
dB
dB
4.5
0.7
9
1.2
1.5
7
2.5
h
FE1/
h
FE2
h
FE
ratio, V
CE
= 3 V, I
c
= 7 mA
h
FE1
= Smaller h
FE
value between Q1 and Q2
h
FE2
= Larger h
FE
value between Q1 and Q2
0.85
1.0
ELECTRICAL CHARACTERISTICS
(T
A
= 25
°
C)
Notes: 1. Pulsed measurement, pulse width
≤
350
μ
s, duty cycle
≤
2 %.
2. Collector to base capacitance when measured with capacitance meter (automatic balanced bridge method), with
emitter connected to guard pin of capacitance meter.
California Eastern Laboratories
OUTLINE DIMENSIONS
(Units in mm)
2.1
±
0.1
1.25
±
0.1
0 ~ 0.1
0.13
±
0.05
0.6
±
0.1
2.0
±
0.2
0.65
1.3
1
2
3
4
5
6
0.22
(All Leads)
+0.10
0.45
R
Package Outline TS06
PIN CONNECTIONS
1. Collector (Q1)
2. Emitter (Q1)
3. Collector (Q2)
4. Base (Q2)
5. Emitter (Q2)
6. Base (Q1)
PIN CONFIGURATION
(Top View)
Note:
Pin 3 is identified with a circle on the bottom of the package.
B1
E2
B2
C1
E1
C2
6
5
4
1
Q1
Q2
2
3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPA821TF-T1 | 制造商:NEC 制造商全稱:NEC 功能描述:NPN SILICON EPITAXIAL TWIN TRANSISTOR |
| UPA822TF | 制造商:NEC 制造商全稱:NEC 功能描述:NPN SILICON HIGH FREQUENCY TRANSISTOR |
| UPA822TF-T1 | 制造商:NEC 制造商全稱:NEC 功能描述:BJT |
| UPA826TC | 制造商:NEC 制造商全稱:NEC 功能描述:NPN SILICON EPITAXIAL TWIN TRANSISTOR WITH BUILT-IN 2 x 2SC5010 FLAT-LEAD 6-PIN THIN -TYPE ULTRA SUPER MINIMOLD |
| UPA826TC_01 | 制造商:NEC 制造商全稱:NEC 功能描述:NPN SILICON EPITAXIAL TWIN TRANSISTOR |
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