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參數(shù)資料
| 型號： | UPA2754 |
| 英文描述： | UPA2754GR Data Sheet | Data Sheet[01/2003] |
| 中文描述： | UPA2754GR數(shù)據(jù)表|數(shù)據(jù)表[01/2003] |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 64K |
| 代理商： | UPA2754 |
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
2002
MOS FIELD EFFECT TRANSISTOR
μ
PA2700TP
SWITCHING
N-CHANNEL POWER MOS FET
DATA SHEET
Document No. G15851EJ2V0DS00 (2nd edition)
Date Published May 2002 NS CP(K)
Printed in Japan
The mark
#
shows major revised points.
DESCRIPTION
The
μ
PA2700TP which has a heat spreader is N-Channel
MOS Field Effect Transistor designed for DC/DC converter
and power management application of notebook computer.
FEATURES
Low on-state resistance
R
DS(on)1
= 5.3 m
MAX. (V
GS
= 10 V, I
D
= 9.0 A)
R
DS(on)2
= 7.3 m
MAX. (V
GS
= 4.5 V, I
D
= 9.0 A)
Low C
iss
: C
iss
= 2600 pF TYP. (V
DS
= 10 V, V
GS
= 0 V)
Small and surface mount package (Power HSOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
μ
PA2700TP
Power HSOP8
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, Unless otherwise noted, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
V
DSS
Gate to Source Voltage (V
DS
= 0 V)
V
GSS
Drain Current (DC) (T
C
= 25°C)
I
D(DC)1
Drain Current (DC) (T
A
= 25°C)
Note1
I
D(DC)2
Drain Current (pulse)
Note2
I
D(pulse)
Total Power Dissipation (T
C
= 25°C)
P
T1
Total Power Dissipation (T
A
= 25°C)
Note1
P
T2
Channel Temperature
T
ch
Storage Temperature
T
stg
Single Avalanche Current
Note3
I
AS
Single Avalanche Energy
Note3
E
AS
30
±
20
±
42
±
20
±
120
37
3
150
V
V
A
A
A
W
W
°C
°C
A
mJ
–55 to + 150
22
48.4
Notes 1.
Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
2.
PW
≤
10
μ
s, Duty Cycle
≤
1%
3.
Starting T
ch
= 25°C, V
DD
= 15 V, R
G
= 25
, L = 100
μ
H, V
GS
= 20
→
0 V
Remark
Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible,
and quickly dissipate it once, when it has occurred.
PACKAGE DRAWING (Unit: mm)
1.27 TYP.
0.12 M
6.0 ±0.3
4.4 ±0.15
1
2.0 ±0.2
0.8 ±0.2
0.40
+0.10
5.2
+0.17
–0.2
0
1
1
0
+
–
1
4
8
5
1, 2, 3
4
5, 6, 7, 8, 9 ; Drain
; Source
; Gate
1
4
8
5
4.1 MAX.
9
2
S
0.10
S
EQUIVALENT CIRCUIT
Source
Body
Diode
Gate
Drain
#
相關(guān)PDF資料 |
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| UPA2780 | UPA2780GR Data Sheet | Data Sheet[04/2003] |
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| UPA2701 | UPA2701GR Data Sheet | Data Sheet[05/2002] |
| UPA2702 | UPA2702TP Data Sheet | Data Sheet[05/2002] |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPA2754GR | 制造商:NEC 制造商全稱:NEC 功能描述:SWITCHING N-CHANNEL POWER MOSFET |
| UPA2754GR-E1 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPA2754GR-E1-A | 制造商:Renesas Electronics 功能描述:Nch 30V 11A 14.5m@4.5V 8SOP Cut Tape |
| UPA2755AGR-E1-AT | 功能描述:MOSFET DL N-CH 30V 8A 8SOP RoHS:是 類別:分離式半導(dǎo)體產(chǎn)品 >> FET - 陣列 系列:- 產(chǎn)品目錄繪圖:8-SOIC Mosfet Package 標(biāo)準(zhǔn)包裝:1 系列:- FET 型:2 個 N 溝道（雙） FET 特點:邏輯電平門 漏極至源極電壓(Vdss):60V 電流 - 連續(xù)漏極(Id) @ 25° C:3A 開態(tài)Rds（最大）@ Id, Vgs @ 25° C:75 毫歐 @ 4.6A，10V Id 時的 Vgs(th)（最大）:3V @ 250µA 閘電荷(Qg) @ Vgs:20nC @ 10V 輸入電容 (Ciss) @ Vds:- 功率 - 最大:1.4W 安裝類型:表面貼裝 封裝/外殼:PowerPAK? SO-8 供應(yīng)商設(shè)備封裝:PowerPAK? SO-8 包裝:Digi-Reel® 產(chǎn)品目錄頁面:1664 (CN2011-ZH PDF) 其它名稱:SI7948DP-T1-GE3DKR |
| UPA2755AGR-E2-AT | 功能描述:MOSFET N-CH DUAL 30V 8-SOIC RoHS:是 類別:分離式半導(dǎo)體產(chǎn)品 >> FET - 陣列 系列:- 產(chǎn)品目錄繪圖:8-SOIC Mosfet Package 標(biāo)準(zhǔn)包裝:1 系列:- FET 型:2 個 N 溝道（雙） FET 特點:邏輯電平門 漏極至源極電壓(Vdss):60V 電流 - 連續(xù)漏極(Id) @ 25° C:3A 開態(tài)Rds（最大）@ Id, Vgs @ 25° C:75 毫歐 @ 4.6A，10V Id 時的 Vgs(th)（最大）:3V @ 250µA 閘電荷(Qg) @ Vgs:20nC @ 10V 輸入電容 (Ciss) @ Vds:- 功率 - 最大:1.4W 安裝類型:表面貼裝 封裝/外殼:PowerPAK? SO-8 供應(yīng)商設(shè)備封裝:PowerPAK? SO-8 包裝:Digi-Reel® 產(chǎn)品目錄頁面:1664 (CN2011-ZH PDF) 其它名稱:SI7948DP-T1-GE3DKR |
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