參數(shù)資料
型號: UPA1715
廠商: NEC Corp.
英文描述: SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE
中文描述: 開關(guān)P溝道功率MOS FET工業(yè)用
文件頁數(shù): 2/8頁
文件大小: 67K
代理商: UPA1715
Data Sheet G16111EJ1V0DS
2
μ
PA620TT
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 20 V, V
GS
= 0 V
10
μ
A
Gate Leakage Current
I
GSS
V
GS
=
±
12 V, V
DS
= 0 V
±
10
μ
A
Gate Cut-off Voltage
V
GS(off)
V
DS
= 10 V, I
D
= 1.0 mA
0.5
1.0
1.5
V
Forward Transfer Admittance
| y
fs
|
V
DS
= 10 V, I
D
= 2.5 A
3.0
6.0
S
Drain to Source On-state Resistance
R
DS(on)1
V
GS
= 4.5 V, I
D
= 2.5 A
30
38
m
R
DS(on)2
V
GS
= 4.0 V, I
D
= 2.5 A
31
39
m
R
DS(on)3
V
GS
= 2.5 V, I
D
= 2.5 A
40
54
m
Input Capacitance
C
iss
V
DS
= 10 V
450
pF
Output Capacitance
C
oss
V
GS
= 0 V
130
pF
Reverse Transfer Capacitance
C
rss
f = 1.0 MHz
90
pF
Turn-on Delay Time
t
d(on)
V
DD
= 10 V, I
D
= 2.5 A
36
ns
Rise Time
t
r
V
GS
= 4.0 V
210
ns
Turn-off Delay Time
t
d(off)
R
G
= 10
150
ns
Fall Time
t
f
200
ns
Total Gate Charge
Q
G
V
DD
= 16 V
5.5
nC
Gate to Source Charge
Q
GS
V
GS
= 4.0 V
1.0
nC
Gate to Drain Charge
Q
GD
I
D
= 5.0 A
2.8
nC
Body Diode Forward Voltage
V
F(S-D)
I
F
= 5.0 A, V
GS
= 0 V
0.87
V
TEST CIRCUIT 2 GATE CHARGE
TEST CIRCUIT 1 SWITCHING TIME
PG.
R
G
0
V
GS
D.U.T.
R
L
V
DD
τ
= 1 s
Duty Cycle
1%
τ
PG.
50
D.U.T.
R
L
V
DD
I
G
= 2 mA
GS
Wave Form
DS
Wave Form
V
GS
V
DS
10%
0
0
90%
90%
90%
V
GS
V
DS
t
on
t
off
t
d(on)
t
r
t
d(off)
t
f
10%
10%
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