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參數(shù)資料
| 型號(hào)： | UPA1453H |
| 廠商： | NEC Corp. |
| 英文描述： | PNP SILICON POWER TRANSISTOR ARRAY HIGH SPEED SWITCHING USE INDUSTRIAL USE |
| 中文描述： | 進(jìn)步黨硅功率晶體管陣列高速開關(guān)使用工業(yè)用 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大小： | 54K |
| 代理商： | UPA1453H |
SILICON TRANSISTOR ARRAY
μ
PA1453
DESCRIPTION
The
μ
PA1453 is PNP silicon epitaxial Power Transistor
Array that built in 4 circuits designed for driving solenoid,
relay, lamp and so on.
FEATURES
Easy mount by 0.1 inch of terminal interval.
High h
FE
. Low V
CE(sat)
.
h
FE
= 100 to 400 (at I
C
= –2 A)
V
CE(sat)
= –0.3 V MAX. (at I
C
= –2 A)
ORDERING INFORMATION
Part Number
Package
Quality Grade
μ
PA1453H
10 Pin SIP
Standard
Please refer to "Quality grade on NEC Semiconductor Devices"
(Document number IEI-1209) published by NEC Corporation to
know the specification of quality grade on the devices and its
recommended applications.
ABSOLUTE MAXIMUM RATINGS (T
a
= 25 C)
Collector to Base Voltage
Collector to Emitter Voltage
Emitter to Base Voltage
Collector Current (DC)
Collector Current (pulse)
Base Current (DC)
Total Power Dissipation
Total Power Dissipation
J unction Temperature
Storage Temperature
V
CBO
V
CEO
V
EBO
I
C(DC)
I
C(pulse)
*
I
B(DC)
P
T1
**
P
T2
***
T
j
T
stg
–60
–60
–7
–5
–10
–1.0
3.5
28
150
V
V
V
A/unit
A/unit
A/unit
W
W
C
C
–55 to +150
*
PW
≤
300
μ
s, Duty Cycle
≤
10 %
**
4 Circuits, T
a
= 25 C
***
4 Circuits, T
c
= 25 C
Document No. IC-3519
(O. D. No. IC-6339)
Date Published September 1994 P
Printed in J apan
PNP SILICON POWER TRANSISTOR ARRAY
HIGH SPEED SWITCHING USE
INDUSTRIAL USE
PACKAGE DIMENSION
(in millimeters)
1 2 3 4 5 6 7 8 910
1
26.8 MAX.
1.4
0.6 ±0.1
2.54
2
4.0
1
1.4
0.5 ±0.1
CONNECTION DIAGRAM
PIN No.
2, 4, 6, 8
3, 5, 7, 9
1, 10
: Base (B)
: Collector (C)
: Emitter (E)
3
2
1
4
5
7
6
8
9
10
The information in this document is subject to change without notice.
1994
DATA SHEET
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