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參數(shù)資料
| 型號(hào)： | UMA1005T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Dual low-power frequency synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 30 MHz, PDSO20 |
| 文件頁數(shù)： | 16/24頁 |
| 文件大?。?/td> | 88K |
| 代理商： | UMA1005T |
November 1994
16
Philips Semiconductors
Preliminary specification
Dual low-power frequency synthesizer
UMA1005T
Notes
1.
Operational conditions:
a) Main and auxiliary divider enabled (EM = EA = 1).
b) NA = 125.
c) NR = 125.
d) NM1 = 60.
e) NM2 = 63.
f) f
i(max)1
= f
i(max)2
= 15 MHz.
g) f
i(max)3
= 60 MHz.
h) Lock condition.
i)
Normal mode; note 5
j)
I
RN
= I
RF
= I
RA
= 25
μ
A.
k) CN = 255.
l)
PA = 0.
Limited supply voltage range 4.5 to 5.5 V.
2.
3.
The relative output current variation is defined as:
I
O
I
O
I
2
I
1
+
; with V
1
= 0.7 V; V
2
= V
DD
0.8 V (see Fig.8).
4.
The output current matching is measured when both (positive and negative current) sections of the output charge
pumps are on.
When a serial ‘A’ word is programmed, the main charge pumps on PHP and PHI are in the ‘speed-up mode’ as long
as STROBE = HIGH, otherwise the main charge pumps are in the ‘normal mode’.
Monotonicity is guaranteed with CN = 0 to 255.
5.
6.
7.
Typical output current:
; specification condition: CN = 255.
Fractional compensation PHI; speed-up mode
(notes 5, 11 and 14)
; V
RN
= V
DD
; V
PHP
=
1
2
V
DD
I
RN
=
62.5
μ
A;
FRD = 1 to 7;
notes 2 and 12
I
RN
=
25
μ
A; FRD = 1 to 7;
note 12
I
PHI(F)
fractional compensation
output current PHI as a
function of FRD
5.4
4.0
2.6
μ
A
2.15
1.60
1.05
μ
A
Charge pump leakage currents; charge pump not active
I
PHP(LO)
output leakage current PHP normal mode;
V
PHP
= 0.7 to V
DDA
0.8 V
note 5
normal mode;
V
PHI
= 0.7 to V
DDA
0.8 V
note 5
10
750
nA
I
PHI(LO)
output leakage current PHI
10
100
nA
I
PHA(LO)
output leakage current PHA V
PHA
= 0.7 to V
DDA
0.8 V
10
750
nA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
--------
2
2
I
I
1
–
×
=
I
PHP(N)
I
RN
–
29
CN
×
=
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