參數(shù)資料
型號(hào): UM3758-084B
廠商: United Microelectronics Corporation
英文描述: TRi-STATE ProgrammaBle Encoder/Decoder
中文描述: 三態(tài)可編程編碼器/解碼器
文件頁數(shù): 7/18頁
文件大小: 651K
代理商: UM3758-084B
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UM3758
General
The operating mode of the UM3756 series is
by the MODE pin. When the ‘MODE’ pin is connected to
V
DO
the circuit will automatically switch to encoder
mode, then
OUT’ pin
‘RX
pin act as an idle pin. When ‘MODE’ pin is
connected to Vss the circuit will switch to decoder
mode, then
OUT” pin will switch to LOW if
comparison is
otherwise this pin will keep HIGH,
and
receives waveform from detect circuit.
as data out pin and
Mode
The encoder mode is selected by connecting “MODE
pin to
The transmit sequence is initiated by the power
nection and continuously transmits till power down.
address bit is encoded into address
(see Fig.
A logic zero is encoded as
a logic one as
and an open as a long pulse
transmitted data
or one and the data pulse
as the address pulse (see Fig.
the state of data pin is either one or
is
one
connected to
connected to Vss.
consecutive long
secutive short
followed by a short pulse.
is encoded into logic
is the
ie.,
The
data
or open and
The
and
mitting. These 16 address pins may
three states (0, 1, open) allowing 3
possible
address and
binations.
samples the 18
this parallel address data for
tri-state address
in either of
then
provides
3 = 531,441 possible
The
and
provide address
and data bits, as described in Table 1.
Part
Number
Address
Bits
10
Address
Combinations
59,049
Data
Bits
Data
Combinations
256
a
6,561
4
16
Decoder Mode
Table 1
The decoder mode is selected by connecting “MODE” pin
to vss.
The decoder receives the serial data from the detect
circuit and outputs the comparison result or data, if
it is valid. The received data may
without data and with data.
For decoder without data
such as
and
the address word is examined bit by bit as
received; if two successive address words
address bis of
the
switch to LOW and
successive
words will
OUT” pin to return to HIGH
(see Fig. 3-l).
the
OUT” pin will
address
For decoder with data IC, such as
the address word with data word are
examined bit by bi as received. The first 10 bits
and
..
(ex.
If the address bits
detect circuit, the next eight data bits are stored
and
to the last valid data stored. When the
word with data is received, the address bis
must
again, and if it does, the data bits are
against the previous stored data biis. If
the two words (eight bits data
the data is transferred to the output data pins
D2 to
If the decoder is momentary type, the data
pins will
the data till the
switches to HIGH; for
will
the data
the next valid data appears
(see Fig. 3-2). Although the address bits
state (0, 1,
open), the data information must be
either one or
An open state will be
a logic one. The above table (Table 1) also describes ___
these (decoder with data).
are assumed to be address bi.
the address bits from
of data
OUT’ pin
decoder, the data pins
as
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