參數(shù)資料
型號: UL631H256S2K35
英文描述: SimtekLow Voltage SoftStore 32K x 8 nvSRAM
中文描述: SimtekLow電壓SoftStore 32K的× 8非易失
文件頁數(shù): 4/13頁
文件大小: 190K
代理商: UL631H256S2K35
UL631H256
4
March 31, 2006
STK Control #ML0057
Rev 1.0
DC Characteristics
Symbol
Conditions
C-Type
K-Type
Unit
Min.
Max.
Min.
Max.
Output High Voltage
Output Low Voltage
V
OH
V
OL
V
CC
I
OH
I
OL
= V
CC
min
=-2 mA
= 2 mA
2.4
0.4
2.4
0.4
V
V
Output High Current
Output Low Current
I
OH
I
OL
V
CC
V
OH
V
OL
= V
CC
min
= 2.4 V
= 0.4 V
2
-2
2
-2
mA
mA
Input Leakage Current
High
Low
I
IH
I
IL
V
CC
V
IH
V
IL
= 3.6 V
= 3.6 V
= 0 V
-1
1
-1
1
μ
A
μ
A
Output Leakage Current
High at Three-State- Output
Low at Three-State- Output
I
OHZ
I
OLZ
V
CC
E or G
V
OH
V
OL
= 3.6 V
V
IH
= 3.6 V
= 0 V
-1
1
-1
1
μ
A
μ
A
SRAM Memory Operations
No.Switching Characteristics
Read Cycle
Symbol
35
45
Unit
Alt.
IEC
Min.
Max.
1
Read Cycle Time
f
t
AVAV
t
cR
35
45
ns
2
Address Access Time to Data Valid
g
t
AVQV
t
a(A)
35
45
ns
3
Chip Enable Access Time to Data Valid
t
ELQV
t
a(E)
35
45
ns
4
Output Enable Access Time to Data
Valid
t
GLQV
t
a(G)
15
20
ns
5
E HIGH to Output in High-Z
h
t
EHQZ
t
dis(E)
13
15
ns
6
G HIGH to Output in High-Z
h
t
GHQZ
t
dis(G)
13
15
ns
7
E LOW to Output in Low-Z
t
ELQX
t
en(E)
5
5
ns
8
G LOW to Output in Low-Z
t
GLQX
t
en(G)
0
0
ns
9
Output Hold Time after Addr. Change
g
t
AXQX
t
v(A)
3
3
ns
10 Chip Enable to Power Active
e
t
ELICCH
t
PU
0
ns
11 Chip Disable to Power Standby
d, e
t
EHICCL
t
PD
35
45
ns
e: Parameter guaranteed but not tested.
f:
Device is continuously selected with E and G both Low.
g:
Address valid prior to or coincident with E transition LOW.
h:
Measured
±
200 mV from steady state output voltage.
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