參數(shù)資料
型號: UDA1321T
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Universal Serial Bus USB Digital-to-Analog Converter DAC
中文描述: 0.055 MHz, MICROCONTROLLER, PDSO28
文件頁數(shù): 22/44頁
文件大小: 280K
代理商: UDA1321T
1998 Oct 06
22
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB)
Digital-to-Analog Converter (DAC)
UDA1321
11
GP1 and GP2 outputs
definition register
reserved
reserved
application GP2 function 2
7
6
5
0 = HID output 2
1 = LED output 2 (activated
when DBB is active)
0 = HID output 1
1 = LED output 1 (activated
when mute is active)
normal or inversed output
functionality:
0 = according Table 7
1 = inversed
application GP1 function 2
4
polarity GP2 function 1
polarity GP1 function 1
polarity GP2 function 2
polarity GP1 function 2
GP1 Usage Page if HID selected
GP1 Usage if HID selected
GP2 Usage Page if HID selected
GP2 Usage if HID selected
time between releasing standby and
enabling the audio output; steps of
20 ms
time between ‘no isochronous data
present’ and activating the mute
output; steps of 1 s (only applicable for
function 1, no digital I/O
communication)
time between activating the mute
output and activating the standby
output; steps of 5 s (only applicable for
function 1, no digital I/O
communication); when filled-in with
zero, standby will not be activated
default bass boost value on top of
Bass USB DAC for Dynamic Bass
Boost (DBB); see Table 5
3
2
1
0
12
13
14
15
16
17
18
19
bass boost = register value; if
bass boost + Bass USB DAC
is larger then the maximum
value of Table 5, the maximum
value is used (no bass boost
in flat mode)
volume =
register value
1A
1B
1C
1D
1E
1F
20
default volume value of USB DAC
idVendor
high byte
idVendor
low byte
idProduct
high byte
idProduct
low byte
bmAttributes
maximum power steps of 2 mA with
maximum 500 mA
BYTE
(HEX)
REGISTER
NAME
COMMENTS
BIT
VALUE
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