參數(shù)資料
型號: UCC5631A
廠商: Benchmark Technology Group
英文描述: Multimode SCSI 9 Line Terminator(多模式小型計(jì)算機(jī)接口14線終端匹配器)
中文描述: 多模的SCSI 9線終結(jié)者(多模式小型計(jì)算機(jī)接口14線終端匹配器)
文件頁數(shù): 1/7頁
文件大?。?/td> 69K
代理商: UCC5631A
UCC5631A
DESCRIPTION
The UCC5631A Multimode SCSI Terminator provides a smooth transition
into the next generation of the SCSI Parallel Interface (SPI-2). It automati-
cally senses the bus, via DIFFB, and switches the termination to either sin-
gle ended (SE) or low voltage differential (LVD) SCSI, dependent on which
type of devices are connected to the bus. The UCC5631A can not be used
on a HVD, EIA485, differential SCSI bus. If the UCC5631A detects a HVD
SCSI device, it switches to a high impedance state.
The Multimode terminator contains all functions required to terminate and
auto detect and switch modes for SPI-2 bus architectures. Single Ended
and Differential impedances and currents are trimmed for maximum effec-
tiveness. Fail Safe biasing is provided to insure signal integrity. Device/Bus
type detection circuitry is integrated into the terminator to provide automatic
switching of termination between single ended and LVD SCSI and a high
impedance for HVD SCSI. The multimode function provides all the perfor-
mance analog functions necessary to implement SPI-2 termination in a sin-
gle monolithic device.
The UCC5631A is offered in a 36 pin SSOP package, as well as a 48 pin
LQFP package for a temperature range of 0°C to 70°C.
Multimode SCSI 9 Line Terminator
FEATURES
Auto Selection Single Ended (SE) or
Low Voltage Differential (LVD)
Termination
Meets SCSI-1, SCSI-2, SCSI-3, SPI,
Ultra (Fast-20), Ultra2 (SPI-2 LVD)
and Ultra3 Standards
2.7V to 5.25V Operation
Differential Failsafe Bias
Thermal packaging for low junction
temperature and better MTBF
Master/Slave Input
Supports Active Negation
3pF Channel Capacitance
Reversed Disconnect Polarity
SLUS443 - OCTOBER 1999
LVD REF 1.25V
17
DISCNCT
REG
L1+
L9–
L9+
SOURCE/SINK REGULATOR
REF 1.3V
20
DIFSENS
–15mA
I
SOURCE
–5mA
50
μ
A
I
SINK
200
μ
A
HIPD
LVD
SE
21
DIFFB
0.6V
2.15V
52.5
32
52.5
31
110
1
SE REF 2.7V
SE GND SWITCH
36
TRMPWR
18
GND
9
L1–
124
52.5
5
52.5
4
110
124
10
μ
A
1.3V
(NOISE LOAD)
SE GND SWITCH
56mV
– +
+ –
– +
56mV
56mV
56mV
+ –
MODE
ALL
SWITCHES
UP
SE
LVD
HIPD
DISCNCT
DOWN
OPEN
OPEN
35
HIPD
34
LVD
33
SE
19
ENABLE
SWITCHES
MSTR/SLV
PATENTED CIRCUIT DESIGN
8
HS/GND
10
27
26
28
BLOCK DIAGRAM
UDG-99165
Note: Indicated pinout is for 36 pin SSOP package.
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