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參數(shù)資料
| 型號： | UCC3941DTR-ADJ |
| 英文描述： | Current-Mode SMPS Controller |
| 中文描述： | 電流模式開關電源控制器 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 156K |
| 代理商： | UCC3941DTR-ADJ |
4
UCC1946
UCC2946
UCC3946
The UCC3946 allows the reset trip voltage to be pro-
grammed with two external resistors. In most applica-
tions VDD is monitored by the reset circuit, however, the
design allows voltages other than VDD to be monitored.
Referring to Fig. 4, the voltage below which reset will be
asserted is determined by:
=1.235 R1+R2
R2
In order to keep quiescent currents low, resistor values in
the megaohm range can be used for R1 and R2. A man-
ual reset can be easily implemented by connecting a mo-
mentary push switch in parallel with R2. RES is
guaranteed to be low with VDD voltages as low as 1V.
V
RESET
Once VDD rises above the programmed threshold, RES
remains low for the reset period defined by:
T
C
RP
RP
=
3 125
.
where T
RP
is time in milliseconds and C
RP
is capacitance
in nanofarads. C
RP
is charged with a precision current
source of 400nA, a high quality, low leakage capacitor
(such as an NPO ceramic) should be used to maintain
timing tolerances. Fig. 5 illustrates the voltage levels and
timings associated with the reset circuit.
Programming the Watchdog Period
The watchdog period is programmed with C
WP
as fol-
lows:
T
C
WP
WP
=
25
where T
WP
is in milliseconds and C
WP
is in nanofarads.
A high quality, low leakage capacitor should be used for
C
WP.
The watchdog input WDI must be toggled with a
high/low or low/high transition within the watchdog period
to prevent WDO from assuming a logic level low. WDO
will maintain the low logic level until WDI is toggled or
RES is asserted. If at any time RES is asserted, WDO
will assume a high logic state and the watchdog period
will be reinitiated. Fig. 6 illustrates the timings associated
with the watchdog circuit.
Connecting WDO to RES
6
7
WDI
WP
8
VDD
3
5
POWER TO
CIRCUITRY
A3
A2
A1
A0
CLK
CLR
8-BIT COUNTER
400nA
WDO
1
GND
EDGE DETECT
WATCHDOG TIMING
100mV
1.235V
2
RTH
4
RP
400nA
POWER ON RESET
R1
VDD
R2
RESET
NMI
I/O
uP
RES
C
WP
1.235V
C
RP
Figure 4. Typical application diagram.
APPLICATION INFORMATION (cont.)
UDG-98002
Note: Pinout represents the 8-pin TSSOP package.
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相關PDF資料 |
PDF描述 |
|---|---|
| UCC3941J-3 | Analog IC |
| UCC3941J-5 | Analog IC |
| UCC3941J-ADJ | Analog IC |
| UCC3941N-5 | Current-Mode SMPS Controller |
| UCC3946DTR | RESET CIRCUIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| UCC3941N-3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| UCC3941N-5 | 功能描述:IC REG BOOST SYNC 5V 0.2A 8DIP RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關穩(wěn)壓器 系列:- 產(chǎn)品培訓模塊:MIC23xxx HyperLight Load™ Regulators 標準包裝:5,000 系列:HyperLight Load® 類型:降壓（降壓） 輸出類型:固定 輸出數(shù):1 輸出電壓:1.8V 輸入電壓:2.7 V ~ 5.5 V PWM 型:混合物 頻率 - 開關:4MHz 電流 - 輸出:2A 同步整流器:是 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-VFDFN 裸露焊盤，8-MLF? 包裝:帶卷 (TR) 供應商設備封裝:8-MLF?（2x2） 產(chǎn)品目錄頁面:1094 (CN2011-ZH PDF) 其它名稱:576-3303-2 |
| UCC3941N-ADJ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| UCC39421EVM003 | 功能描述:EVALUATION MODULE FOR UCC39421 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - DC/DC 與 AC/DC（離線）SMPS 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:True Shutdown™ 主要目的:DC/DC，步升 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓撲結(jié)構(gòu):升壓 頻率 - 開關:3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| UCC39421N | 功能描述:DC/DC 開關控制器 Hi Freq Multimode Synch Cntrlr RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風格: 封裝 / 箱體:CPAK |
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