參數(shù)資料
型號(hào): UCC3941DTR-5
英文描述: Current-Mode SMPS Controller
中文描述: 電流模式開(kāi)關(guān)電源控制器
文件頁(yè)數(shù): 3/6頁(yè)
文件大?。?/td> 156K
代理商: UCC3941DTR-5
3
UCC1946
UCC2946
UCC3946
The UCC3946 supervisory circuit provides accurate reset
and watchdog functions for a variety of microprocessor
applications. The reset circuit prevents the microproces-
sor from executing code during undervoltage conditions,
typically during power-up and power-down. In order to
prevent erratic operation in the presence of noise, volt-
age “glitches” whose voltage amplitude and time duration
are less than the values specified in Fig. 1 are ignored.
The watchdog circuit monitors the microprocessor’s ac-
tivity, if the microprocessor does not toggle WDI during
the programmable watchdog period WDO will go low,
alerting the microprocessor’s interrupt of a fault. The
WDO pin is typically connected to the non-maskable in-
put of the microprocessor so that an error recovery rou-
tine can be executed.
Programming the Reset Voltage and Reset Period
APPLICATION INFORMATION
0
20
40
60
80
100
120
140
160
180
200
100
110
120
130
140
150
160
170
180
DELAY (
μ
S)
O
R
RT SENSES GLITCH,
RES GOES LOW FOR RESET PERIOD
GLITCHES ARE IGNORED,
RESB REMAINS HIGH
Figure 1. Overdrive voltage vs. delay to output low
on RESB.
Slew rate: –1V/mS; monitored voltage = V
DD
.
GND:
Ground reference for the IC.
RES:
This pin is high only if the voltage on the RTH has
risen above 1.235V. Once RTH rises above the thresh-
old, this pin remains low for the reset period. This pin will
also go low and remain low if the RTH voltage dips below
1.235V for an amount of time determined by Figure 1.
RTH:
This input compares its voltage to an internal 1.25V
reference. By using external resistors, a user can pro-
gram any reset threshold he wishes to achieve.
RP:
This pin allows the user to program the reset period
by adjusting an external capacitor.
VDD:
Supply voltage for the IC.
WDI:
This pin is the input to the watchdog timer. If this
pin is not toggled or strobed within the watchdog period,
WDO is asserted.
WDO:
This pin is the watchdog output. This pin will be
asserted low if the WDI pin is not strobed or toggled
within the watchdog period.
WP:
This pin allows the user to program the watchdog
period by adjusting an external capacitor.
PIN DESCRIPTIONS
Figure 2. Typical RTH threshold vs. temperature.
9
9.5
10
10.5
11
11.5
12
12.5
2
3
4
5
VDD (V)
I
Figure 3. Typical IDD vs VDD.
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