參數(shù)資料
型號: UCC3581D
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 5.0 AMP POSITIVE VOLTAGE REGULATOR
中文描述: 5.0放大器正電壓穩(wěn)壓器
文件頁數(shù): 5/9頁
文件大小: 241K
代理商: UCC3581D
5
UCC1581
UCC2581
UCC3581
The externally bypassed 4.0V reference is controlled by
undervoltage lockout and chip enable circuitry. The en-
able input is internally tied to a 10
μ
A current source
which allows the pin to be driven by an open collector
driver. The part is also enabled if EN floats. The
UCC3581 has a soft start function which requires a user
supplied external timing capacitor. When in soft start
mode, the soft start capacitor, C
SS
, is charged with a
constant current source. The soft start current is 3.75X
the current in RT1.
There is an on-chip control amplifier, which when driving
the gate of an external depletion mode N-MOSFET, acts
as a 7.5V linear preregulator supplying VDD directly from
the primary input power line. The preregulator may sub-
sequently be fully disabled by a tertiary bootstrap winding
providing a minimum of 8.2V to the VDD pin.
Computation of DCMIN
DCMIN for a given duty cycle is calculated as follows:
(
V
i
DC
C
)
t
t
OSC
ON
OFF
T
=
+
where:
i = oscillator charge current = 9.2 . (2.0V/RT1)
DC = Duty Cycle, as a fraction of 1
t
ON
= 0.082
RT1
CT
t
OFF
= 0.95
RT2
CT
C
T
= Oscillator Capacitor
The CT pin ramp slews from 1V to 2.5V. Therefore, add
V to 1V to get DCMIN voltage.
Example: For 10% duty cycle with RT1 = 680k
, RT2 =
12k
, and CT = 705pF,
(
)
V
i
DC
t
t
C
OSC
ON
OFF
T
=
+
( )
01
.
=
+
5
6
9 2
.
2 0
680
4 182 10
.
8 55 10
.
.
sec
sec
V
k
750 10
12
V
V
=
018
.
Therefore,
DCMIN
V
1
V
V
=
+
=
018
.
118
.
A Typical Micropower Application
The circuit shown in Fig. 3 illustrates the use of the
UCC3581 in a micropower application. The isolated 5V
flyback power supply uses a minimum of parts and oper-
ates over an 8:1 input voltage range (15VDC to 120VDC)
while delivering a regulated 5V output with a load swing
from 0W to 1W. It operates in the discontinuous mode at
light load or high line, and continuous mode at heavier
loads and lower line voltages. Higher input line voltages
are possible by simply increasing the voltage ratings of
C1, Q1, D1 and D2.
The most notable feature of the design is its efficiency.
With a load of 1 watt, the typical efficiency is 82%, drop-
ping to 70% around 50mW. With a load of only 12.5mW,
the efficiency remains as high as 50%. At this load, with
an input of 50V, the total input current is only 500
μ
A.
Note that the power supply can be disabled by pulling the
UCC3581 enable pin low, in which case the input current
drops to less than 150
μ
A.
The UCC3581 achieves very low losses by means of low
quiescent current and pulse skipping at light loads which
reduces switching losses. The degree of pulse skipping is
controlled by programming the minimum duty cycle. In
this example, the frequency is 35kHz at maximum load
and drops to <2kHz at 12.5mW load (minimum pulse
width of around 6
μ
sec, or 21% duty cycle at 35kHz).
Another way losses are reduced is operating with a VDD
of around 10V rather than the more common 12V to 16V.
At such light primary currents, the MOSFET remains in
full saturation with a gate drive voltage well below 10V.
Gate drive losses are minimized by choosing a MOSFET
with low total gate charge, in this case only 8nC maxi-
mum. By choosing a large gate drive resistor, EMI is min-
imized by reducing peak currents. Due to pulse skipping,
switching times are less critical for efficiency at light load.
The
(MOC8100) are also key to the efficiency at such light
loads, and were chosen for their low operating current.
The LM3411 has a quiescent current of only 150
μ
A maxi-
mum (compared to 1mA for the more common TL431). In
addition, because it is not a three terminal device, the
LM3411’s quiescent current does not flow in the
optocoupler LED. Since this bias current is not in the
feedback control path, a higher value pull-up resistor can
be used on the optocoupler output transistor, further re-
shunt
regulator
(LM3411)
and
optocoupler
APPLICATION INFORMATION (cont.)
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