參數(shù)資料
型號: UCC2807PWTR-3
廠商: Texas Instruments, Inc.
英文描述: Programmable Maximum Duty Cycle PWM Controller
中文描述: 可編程最大占空比PWM控制器
文件頁數(shù): 4/11頁
文件大?。?/td> 314K
代理商: UCC2807PWTR-3
4
UCC1807-1/-2/-3
UCC2807-1/-2/-3
UCC3807-1/-2/-3
TRIG/DISCH:
Oscillator control pins. Trig is the oscillator
timing input, which has an RC-type charge/discharge sig-
nal controlling the chip’s internal oscillator. DISCH is the
pin which provides the low impedance discharge path for
the external RC network during normal operation. Oscil-
lator frequency and maximum duty cycle are computed
as follows:
frequency
R
R
C
duty cycle
R
R
R
R
A
B
T
A
B
A
B
14
.
2
2
as shown in Figure 1.
For best performance, keep the lead from C
T
to GND as
short as possible. A separate ground connection for C
T
is
desirable. The minimum value of R
A
is 10k , the mini-
mum value of R
B
is 2.2k , and the minimum value of C
T
is 47pF.
VDD:
The power input connection for this device. Total
VDD current is the sum of quiescent current and the av-
erage OUT current. Knowing the operating frequency
and the MOSFET gate charge (Qg), average OUT cur-
rent can be calculated from
I
OUT
= Qg
F, where F is frequency.
To prevent noise problems, bypass VDD to GND with a
ceramic capacitor as close to the chip as possible in par-
allel with an electrolytic capacitor.
PIN DESCRIPTIONS (cont.)
Figure 1. Oscillator Block Diagram
UDG-95002-1
T1:
Core
Primary:
Secondary:
L1
:
Core:
Magnetics Inc. #P-42625-UG (ungapped)
28 turns of 2x #26AWG
6 turns of 50x0.2mm Litz wire
Main Winding:
Second Winding:
Magnetics Inc.
900 E. Butler Road
P.O. Box 391
Butler, PA 16003
Tel: (412) 282-8282
Fax: (412) 282-6955
Magnetics Inc. #P-42625-SG-37 (0.020”
gap)
13 turns of 2x #18AWG
11 turns of #26AWG
The circuit shown in Fig. 2 illustrates the use of the
UCC3807 in a typical off-line application. The 100W,
200kHz, universal input forward converter produces a
regulated 12VDC at 8 Amps. The programmable maxi-
mum duty cycle of the UCC3807 allows operation down
to 80VRMS and up to 265VRMS with a simple RCD
clamp to limit the MOSFET voltage and provide core re-
set. In this application the maximum duty cycle is set to
about 65%. Another feature of the design is the use of a
flyback winding on the output filter choke for both boot-
strapping and voltage regulation. This method of loop clo-
sure eliminates the optocoupler and secondary side
regulator, common to most off-line designs, while provid-
ing good line and load regulation.
APPLICATIONS INFORMATION
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