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參數(shù)資料
| 型號(hào)： | UCC1808-x |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Low Power Current Mode Push-Pull PWM |
| 中文描述： | 低功耗電流模式推挽式脈寬調(diào)制 |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 148K |
| 代理商： | UCC1808-X |
4
UCC1808-1/-2
UCC2808-1/-2
UCC3808-1/-2
f
RC
OSCILLATOR
=
1 41
.
where frequency is in Hertz, resistance in Ohms, and ca-
pacitance in Farads. The recommended range of timing
resistors is between 10k
and 200k
and range of tim-
ing capacitors is between 100pF and 1000pF. Timing re-
sistors less than 10k
should be avoided.
For best performance, keep the timing capacitor lead to
GND as short as possible, the timing resistor lead from
VDD as short as possible, and the leads between timing
components and RC as short as possible. Separate
ground and VDD traces to the external timing network
are encouraged.
VDD:
The power input connection for this device. Al-
though quiescent VDD current is very low, total supply
current will be higher, depending on OUTA and OUTB
current, and the programmed oscillator frequency. Total
VDD current is the sum of quiescent VDD current and
the average OUT current. Knowing the operating fre-
quency and the MOSFET gate charge (Qg), average
OUT current can be calculated from
I
OUT
= Qg F, where F is frequency.
To prevent noise problems, bypass VDD to GND with a
ceramic capacitor as close to the chip as possible along
with an electrolytic capacitor. A 1
μ
F decoupling capacitor
is recommended.
PIN DESCRIPTIONS (cont.)
The oscillator generates a sawtooth waveform on RC. During the RC rise time, the output stages alternate on time, but both
stages are off during the RC fall time. The output stages switch a the oscillator frequency, with guaranteed duty cycle of <
50% for both outputs.
Figure 1. Block diagram for oscillator.
UDG-97009
A 200kHz push-pull application circuit with a full wave rec-
tifier is shown in Fig. 2. The output, V
O
, provides 5V at
75W maximum and is electrically isolated from the input.
Since the UCC3808 is a peak current mode controller the
2N2222A emitter following amplifier (buffers the CT wave-
form) provides slope compensation which is necessary
for duty ratios greater than 50%. Capacitor decoupling is
very important with a single ground IC controller and a
1
μ
F is suggested as close to the IC as possible. The con-
troller supply is a series RC for startup, paralleled with a
bias winding on the output inductor used in steady state
operation.
Isolation is provided by an optocoupler with regulation
done on the secondary side using the UC3965 Precision
Reference with Low Offset Error Amplifier. Small signal
compensation with tight voltage regulation is achieved
using this part on the secondary side. Many choices ex-
ist for the output inductor depending on cost, volume,
and mechanically strength. Several design options are
iron powder, molypermalloy (MPP), or a ferrite core with
an air gap as shown here. The main power transformer
is a low profile design, EFD size 25, using Magnetics
Inc. P material which is a good choice at this frequency
and temperature. The input voltage may range from 36V
dc to 72V dc. Refer to application note U-170 for addi-
tion design information.
APPLICATION INFORMATION
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