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參數(shù)資料
| 型號(hào)： | UC62WV0256BC-55 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | DRAM |
| 英文描述： | Low Power CMOS SRAM 32K X8 Bits |
| 中文描述： | 低功耗CMOS SRAM 32K的X8位 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 465K |
| 代理商： | UC62WV0256BC-55 |
Low Power CMOS SRAM
32K X8 Bits
UC62WV0256
-35/-55/-70
SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE1
(1,2,4)
t
AA
t
OH
t
OH
t
RC
ADDRESS
D
OUT
READ CYCLE2
(1,3,4)
t
CE
t
CLZ
(5)
t
CHZ
(5)
CE
D
OUT
READ CYCLE3
(1,4)
t
AA
t
OH
t
RC
ADDRESS
t
CE
t
CLZ
(5)
t
CHZ
(5)
CE
D
OUT
OE
t
OHZ
(1,5)
t
OE
t
OLZ
NOTES:
1. WE\ is high in read cycle.
2. Device is continuously selected when CE\ = VIL
3. Address valid prior to or coincident with CE\ transition low.
4. OE\ = VIL.
5. Transition is measured ±500mV from steady state with CL=5pF as shown in Figure 1B. The
parameter is guaranteed but not 100% tested.
U-Chip Technology Corp. LTD.
Reserves the right to modify document contents without notice.
Revision 2.0
PAGE 5
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PDF描述 |
|---|---|
| UC62WV0256BC-70 | Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256CI-35 | Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256CI-55 | Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256CI-70 | Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256DC-35 | Low Power CMOS SRAM 32K X8 Bits |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UC62WV0256BC-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256BI-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256BI-55 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256BI-70 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM 32K X8 Bits |
| UC62WV0256CC-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM 32K X8 Bits |
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