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參數(shù)資料
| 型號(hào)： | UC62LS4096JC-20 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Low Power CMOS SRAM |
| 中文描述： | 低功耗CMOS SRAM |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大小： | 143K |
| 代理商： | UC62LS4096JC-20 |
Low Power CMOS SRAM
256K X 16
UC62LS4096
-20/-25
Features:
Vcc operation voltage : 3.0 V~ 3.6V
Low power consumption :
20mA (Max.) operating current
2uA (Typ.) CMOS standby current
High Speed Access time :
25ns (Max.) at Vcc = 3.0V
Automatic power down when chip is deselected
Three state outputs and TTL compatible
Data retention supply voltage as low as 1.2V
Easy expansion with CE\ and OE\ options
PRODUCT FAMILY
Description
The UC62LS4096 is a high performance, low power
CMOS Static Random Access Memory organized as 262,144
words by 16 and operates from 3.0V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide
both high speed and low power features with a typical CMOS
standby current of 2uA and maximum access time of 25ns in
3.0V operation.
Easy memory expansion is provided enable (CE\), and
active LOW output enable (OE\) and three-state output
drivers.
The UC62LS4096 has an automatic power down feature,
reducing the power consumption significantly when chip is
deselected.
The US62LS4096 is available in the JEDEC standard 44
pin TSOP (Type II) and 48 pin mini-BGA.
Power Consumption
STANDBY
Vcc=3.3V(Typ.)
Speed
(ns)
Operating
Vcc=3.6V(Max.)
Product Family
Operating
Tempature
Vcc Range
Vcc=3.0V(Max.)
Package
Type
UC62LS4096JC
UC62LS4096KC
UC62LS4096AC
UC62LS4096JI
UC62LS4096KI
UC62LS4096AI
TSOPII-44
BGA-48
DICE
TSOPII-44
BGA-48
DICE
0
~ 70
3.0V ~ 3.6V
20/25
2uA
20mA
-40
~ 85
3.0V ~ 3.6V
20/25
2uA
20mA
PIN CONFIGURATIONS
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
GND
DQ4
DQ5
DQ6
DQ7
WE
A16
A15
A14
A13
A12
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A17
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
UC62LS4096JI
UC62LS4096JC
LB
OE
A0
A1
A2
NC
DQ8
UB
A3
A4
CE
DQ0
DQ9
DQ10
A5
A6
DQ1
DQ2
GND
DQ11
NC
A7
DQ3
VCC
VCC
DQ12
NC
A16
DQ4
GND
DQ14
DQ13
A14
A15
DQ5
DQ6
DQ15
NC
A12
A13
WE
DQ7
NC
A8
A9
A10
A11
A17
BLOCK DIAGRAM
MEMORY ARRAY
256K X 16 Bits
R
D
COLUMN DECODER
SENSE &
WRITE DRIVER
X16
I/O BUFFER
A
B
C
B
C
B
COL
Address
ROW
Address
CE
WE
OE
UB
LB
A
CE
WE
OE
UB
LB
DQ0 ~ DQ15
U-Chip Technology Corp. LTD.
Reserves the right to modify document contents without notice.
PAGE
1
Preliminary
Rev.1.0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UC62LS4096JC-25 | Low Power CMOS SRAM |
| UC62LS4096JI-20 | Low Power CMOS SRAM |
| UC62LS4096JI-25 | Low Power CMOS SRAM |
| UC62LS4096KC-20 | Low Power CMOS SRAM |
| UC62LS4096KC-25 | Low Power CMOS SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UC62LS4096JC-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LS4096JI-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LS4096JI-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LS4096KC-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM |
| UC62LS4096KC-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low Power CMOS SRAM |
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