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參數(shù)資料
| 型號： | UC5181CQTR |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Very low drop voltage regulators with inhibit |
| 中文描述： | 線路接收器|八路|雙極|差| LDCC | 28腳|塑料 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 214K |
| 代理商： | UC5181CQTR |
UC5180C
APPLICATIONS INFORMATION
Failsafe Operation
These devices provide a failsafe operating mode to
guard against input fault conditions as defined in
EIA422A and EIA423A standards. These fault condi-
tions are (1) drive in power-off condition, (2) receiver not
interconnected with driver, (3) open-circuited intercon-
necting cable, and (4) short-circuited interconnecting
cable. If one of these four fault conditions occurs at the
inputs of a receiver, then the output of that receiver is
driven to a known logic level. The receiver is pro-
grammed by connecting the failsafe input to V
CC
or
ground. A connection to V
CC
provides a logic "1" output
under fault conditions, while a connection to ground
provides a logic "0". There are two failsafe pins (F
S1
and F
S2
) on the UC5180C where each provides com-
mon failsafe control for four receivers.
Input Filtering (UC5180C)
The UC5180C has input filtering for additional noise re-
jection. This filtering is a function of both signal level
and frequency. For the specified input (5.5 MHz at
±
500
mV) the input stage filter attenuates the signal such that
the output stage threshold levels are not exceeded and
no change of state occurs at the output.
EIA232E/V.28 / EIA423A/V.10 DATA TRANSMISSION
EIA422A/V.11 DATA TRANSMISSION
UNITRODE INTEGRATED CIRCUITS
7 CONTINENTAL BLVD.
MERRIMACK, NH 03054
TEL. (603) 424-2410
FAX (603) 424-3410
Figure 2.
AC Test Circuit
3
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