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| 型號： | UC3903QTR |
| 英文描述： | Hex D-type flip flop with clear |
| 中文描述： | 電壓檢測器 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 171K |
| 代理商： | UC3903QTR |
UC1902
UC2902
UC3902
PRELIMINARY
SLUS232 - FEBRUARY 1999
FEATURES
2.7V to 20V Operation
8-Pin Package
Requires Minimum Number of
External Components
Compatible with Existing Power
Supply Designs Incorporating Remote
Output Voltage Sensing
Differential Share Bus
Precision Current Sense Amplifier with
Gain of 40
UVLO (Undervoltage Lockout)
Circuitry
User Programmable Share Loop
Compensation
Load Share Controller
1
3
2
4
8
6
7
5
+
–
R
40R
LOAD SHARE CONTROLLER
+
–
ADJ AMPLIFIER
BIAS
UVLO
+
–
+
–
+
–
SHARE SENSE AMPLIFIER
SHARE DRIVE AMPLIFIER
2.3V
35mV
+
0.6V
+
CURRENT SENSE
AMPLIFIER
ERROR AMPLIFIER
GND
SENSE
ADJ
ADJR
VCC
SHARE+
SHARE–
COMP
BLOCK DIAGRAM
UDG-99042
DESCRIPTION
The UC3902 load share controller is an 8-pin device that balances the cur-
rent drawn from independent, paralleled power supplies. Load sharing is
accomplished by adjusting each supply’s output current to a level propor-
tional to the voltage on a share bus.
The master power supply, which is automatically designated as the supply
that regulates to the highest voltage, drives the share bus with a voltage
proportional to its output current. The UC3902 trims the output voltage of
the other paralleled supplies so that they each support their share of the
load current. Typically, each supply is designed for the same current level
although that is not necessary for use with the UC3902. By appropriately
scaling the current sense resistor, supplies with different output current ca-
pability can be paralleled with each supply providing the same percentage
of their output current capability for a particular load.
A differential line is used for the share bus to maximize noise immunity and
accommodate different voltage drops in each power converter’s ground re-
turn line. Trimming of each converter’s output voltage is accomplished by
injecting a small current into the output voltage sense line, which requires a
small resistance (typically 20
– 100
) to be inserted.
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UC3904DW | Octal bus buffer with 3 state outputs (inverted) |
| UC3904DWTR | Octal bus buffer with 3 state outputs (non inverted) |
| UC3904J | Octal bus transceiver with 3 state outputs (non inverted) |
| UC3904N | Power Supply Supervisor |
| UC2909J | LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UC3903QTRG3 | 功能描述:監(jiān)控電路 Quad Supply and Line Monitor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| UC3904 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Precision Quad Supply and Line Monitor |
| UC3904DW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Power Supply Supervisor |
| UC3904DWTR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Power Supply Supervisor |
| UC3904J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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