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參數(shù)資料
| 型號： | UC3844QTR |
| 英文描述： | Low voltage dual SPDTswitch with negative rail capacitance |
| 中文描述： | 電流模式開關(guān)電源控制器 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 463K |
| 代理商： | UC3844QTR |
UC1842/3/4/5
UC2842/3/4/5
UC3842/3/4/5
UNDER-VOLTAGE LOCKOUT
CURRENT SENSE CIRCUIT
OSCILLATOR SECTION
During under-voltage lock-out, the output driver is biased to
sink minor amounts of current. Pin 6 should be shunted to
ground with a bleeder resistor to prevent activating the power
switch with extraneous leakage currents.
A small RC filter may be required to suppress switch transients
.
Peak Current (I
S
) is Determined By The Formula
I
SMAX
≈
1.0V
R
S
5
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