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參數(shù)資料
| 型號： | UC3714D |
| 英文描述： | DMOS dual full bridge driver |
| 中文描述： | 雙外圍驅(qū)動器 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 300K |
| 代理商： | UC3714D |
3
UC1714/5
UC2714/5
UC3714/5
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated, V
CC
= 15V, ENBL
≥
2V, R
T
1 = 100k
from T1 to GND,
R
T
2 = 100k
from T2 to GND, and
55
°
C < T
A
< 125°C for the UC1714/5,
40°C < T
A
< 85°C for the UC2714/5, and 0
°
C < T
A
<
70
°
C for the UC3714/5, T
A
= T
J
.
PARAMETER
TEST CONDITIONS
Auxiliary Driver (AUX)
AUX Output Low, Sat (V
AUX)
V
IN
= 2.0V, I
OUT
= 20mA
V
IN
= 2.0V, I
OUT
= 200mA
AUX Output High, Sat (V
CC
– V
AUX
)
V
IN
= 0.8V, I
OUT
= -10mA
V
IN
= 0.8V, I
OUT
= -100mA
Rise Time
C
L
= 1000pF
Fall Time
C
L
= 1000pF
T2 Delay, PWR to AUX
INPUT falling edge, R
T
2 = 10k
(Note 4)
T2 Delay, PWR to AUX
INPUT falling edge, R
T
2 = 100k
(Note 4)
AUX Prop Delay
INPUT rising edge, 50% (Note 3)
Enable (ENBL)
Input Threshold
Input Current, I
IH
ENBL = 15V
Input Current, I
IL
ENBL = 0V
T1
Current Limit
T1 = 0V
Nominal Voltage at T1
Minimum T1 Delay
T1 = 2.5V, (Note 4)
T2
Current Limit
T2 = 0V
Nominal Voltage at T2
Minumum T2 Delay
T2 = 2.5V, (Note 4)
Input (INPUT)
Input Threshold
Input Current, I
IH
INPUT = 15V
Input Current, I
IL
INPUT = 0V
MIN
TYP
MAX
UNITS
0.3
1.8
2.1
2.3
45
30
50
350
35
0.8
2.6
3.0
3.0
60
60
80
550
80
V
V
V
V
ns
ns
ns
ns
ns
20
250
0.8
1.2
1
1
2.0
10
10
V
μ
A
μ
A
1.6
3
40
2
3.3
70
mA
V
ns
2.7
1.2
3
50
2
3.3
100
mA
V
ns
2.7
0.8
1.4
1
5
2.0
10
20
V
μ
A
μ
A
Note 3:
Propagation delay times are measured from the 50% point of the input signal to the 10% point of the output signal’s transi-
tion with no load on outputs.
Note 4:
T1 delay is defined from the 50% point of the transition edge of AUX to the 10% of the rising edge of PWR. T2 delay is de-
fined from the 90% of the falling edge of PWR to the 50% point of the transition edge of AUX.
PIN DESCRIPTIONS
AUX:
The AUX switches immediately at INPUT’s rising
edge but waits through the T2 delay after INPUT’s falling
edge before switching. AUX is capable of sourcing 0.5A
and sinking 1.0A of drive current. See the Time Relation-
ships diagram below for the difference between the
UC1714 and UC1715 for INPUT, MAIN, and AUX. During
sleep mode, AUX is inactive with a high impedance.
ENBL:
The ENBL input switches at TTL logic levels (ap-
proximately 1.2V), and its input range is from 0V to 20V.
The ENBL input will place the device into sleep mode
when it is a logical low. The current into V
CC
during the
sleep mode is typically 220
μ
A.
GND:
This is the reference pin for all input voltages and
the return point for all device currents. It carries the full
peak sinking current from the outputs. Any tendency for
the outputs to ring below GND voltage must be damped
or clamped such that GND remains the most negative
potential.
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