參數(shù)資料
型號: UC2854AQ
廠商: Texas Instruments, Inc.
元件分類: 基準電壓源/電流源
英文描述: ADVANCED HIGH-POWER FACTOR PREREGULATOR
中文描述: 先進的高功率因數(shù)前置穩(wěn)壓器
文件頁數(shù): 3/16頁
文件大?。?/td> 455K
代理商: UC2854AQ
3
www.ti.com
PACKAGE DESCRIPTION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
PKLMT
CAO
ISENSE
MOUT
IAC
VAO
VRMS
GTDRV
VCC
CT
SS
RSET
VSENSE
ENA
VREF
J, N and DW PACKAGES
(TOP VIEW)
5
4
6
7
8
18
17
16
15
14
ISENSE
CAOUT
N/C
MOUT
IAC
CT
SS
N/C
RSET
VSENSE
3 2 1 20 19
9 10 11 12 13
P
G
N
G
V
V
V
N
V
E
Q PACKAGE
(TOP VIEW)
N/C No connection
ORDERING INFORMATION
UVLO
TURN-ON
(V)
UVLO
TURN-OFF
(V)
PART NUMBERS
PDIP16
(N)
TA
CDIP16
(J)
SOIC16
(DW)
PLCC20
(Q)
55
°
C to 125
°
C
16
10
10.5
10
UC1854BJ
40
°
C to 85
°
C
16
10
UC2854AJ
UC2854AN
UC2854ADW
UC2854AQ
10.5
10
UC2854BJ
UC2854BN
UC2854BDW
UC2854BQ
0
°
C to 70
°
C
16
10
UC3854AN
UC3854ADW
10.5
10
UC3854BN
UC3854BDW
(1)The DW and Q packages are available taped and reeled. Add TR suffix to device type (e.g. UC2854ADWTR) to order quantities of 2,000
devices per reel for the DW package and 1,000 devices per reel for the Q package.
THERMAL RESISTANCE
PACKAGED DEVICES
PDIP16
(N)
RESISTANCES
CDIP16
(J)
28(2)
SOP16
(DW)
PLCC20
(Q)
θ
JC (
°
C/W)
θ
JA (
°
C/W)
45
27
34
80120
90(3)
50130(3)
4375(3)
(2)
θ
JC data values stated are derived from MIL-STD-1835B which states “the baseline values shown are worst case (mean +2s) for a 60
×
60
mil microcircuit device silicon die and applicable for devices with die sizes up to 14,400 square mils. For device die sizes greater than
14,400 square mils use the following values, dual-in-line, 11
°
C/W; flat pack and pin grid array, 10
°
C/W.
(3)
θ
JA (junction-to-ambient) applies to devices mounted to five square inch FR4 PC board with one ounce copper where noted. When
resitance range is given, lower values are for five square inch aluminum PC board. Test PWB is 0.062 inches thick and typically uses
0.635 mm trace widths for power packages and 1.3 mm trace widths for non-power packages with a 100
×
100 mil probe land are at the
end of each trace.
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