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參數(shù)資料
| 型號(hào)： | UC2709QTR |
| 英文描述： | HIGH SIDE DRIVER |
| 中文描述： | 雙MOSFET驅(qū)動(dòng)器 |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大小： | 364K |
| 代理商： | UC2709QTR |
4
UC1707
UC2707
UC3707
The input zener may be used to clamp input signal voltages
higher than 5V as long as the zener current is limited to
10mA max. External pull-up resistors are not required.
SIMPLIFIED INTERNAL CIRCUITRY
Figure 1. Typical digital input gate.
Figure 3. Latch disable.
The Shutdown latch is disabled when pin 3 is open. An im-
pedance of 4k or less from pin 3 to ground will allow a shut-
down signal to set the latch which can then be reset by
either recycling the VIN supply or by momentarily (>200ns)
raising pin 3 high.
The input common-mode voltage range is from ground to (VIN-3V). When not used both inputs shoul1d be grounded. Activate
time is a function of overdrive with a typical value of 180ns. Pin 7 serves both as a comparator output and as a common digital
shutdown input. A high signal here will accomplish the fastest turn off of both outputs. Note that "OFF" is defined as the outputs
low. Pulling shutdown low defeats the latch operation regardless of its status.
Figure 2. Typical digital input gate.
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