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參數(shù)資料
| 型號(hào)： | UC1849PW |
| 英文描述： | Digitally controlled audio processor |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 530K |
| 代理商： | UC1849PW |
6
UC1842A/3A/4A/5A
UC2842A/3A/4A/5A
APPLICATIONS DATA (cont.)
Oscillator Section
Open-Loop Laboratory Test Fixture
Oscillator Frequency vs Timing Resistance
Maximum Duty Cycle vs Timing Resistor
High peak currents associated with capacitive loads necessi-
tate careful grounding techniques. Timing and bypass capaci-
tors should be connected close to pin 5 in a single point
ground. The transistor and 5k potentiometer are used to sam-
ple the oscillator waveform and apply an adjustable ramp to
pin 3.
Slope Compensation
A fraction of the oscillator ramp can be resistively
summed with the current sense signal to provide slope
compensation for converters requiring duty cycles over
50%.
Note that capacitor, C, forms a filter with R2 to suppress
the leading edge switch spikes.
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相關(guān)代理商/技術(shù)參數(shù) |
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| UC1849PWTR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| UC1849Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| UC1849QTR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| UC184DW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| UC184DWTR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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