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參數(shù)資料
| 型號： | UC1725 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Isolated High Side FET Driver |
| 中文描述： | 隔離高側(cè)FET驅(qū)動器 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大?。?/td> | 294K |
| 代理商： | UC1725 |
UC1725
UC2725
UC3725
CURRENT LIMIT AND TIMING:
Current sensing and
shutdown can be implemented directly at the output us-
ing the scheme shown in Figure 4. Alternatively, a current
transformer can be used in place of R
SENSE
. A small RC
filter in series with the input (pin 4) is generally needed to
eliminate the leading edge current spike caused by
parasitic circuit capacitances being charged during turn
on. Due to the speed of the current sense circuit, it is
very important to ground C
F
directly to Gnd as shown to
eliminate false triggering of the one shot caused by
ground drops.
One shot timing is easily programmed using an external
capacitor and resistor as shown in Figure 4. This, in turn,
controls the output off time according to the formula:
T
OFF
= 1.28
RC
If current limit feature is not required, simply ground pin 4
and leave pin 5 open.
OUTPUT:
Gate drive to the power FET is provided by a
totem pole output stage capable of sourcing and sinking
currents in excess of 1 amp. The undervoltage lockout
circuit guarantees that the high level output will never be
less than 9 volts. In addition, during undervoltage lock-
out, the output stage will actively sink current to eliminate
the need for an external gate to source resistor. High
level output is also clamped to 15 volts. Under high ca-
pacitive loading however, the output may overshoot 2 to
3 volts, due to the drivers’ inabitlity to switch from full to
zero output current instantaneously. In a practical circuit
this is not normally a concern. A few ohms of series gate
resistance is normally required to prevent parasitic oscil-
lations, and will also eliminate overshoot at the gate.
ENABLE:
An enable pin is provided as a fast, digital in-
put that can be used in a number of applications to di-
rectly switch the output. Figure 6 shows a simple means
of providing a fast, high voltage translation by using a
small signal, high voltage transistor in a cascode configu-
ration. Note that the UC1725 is still used to provide
power, drive and protection circuitry for the power FET.
FIGURE 4 - Current Limit
UDG-92050
FIGURE 5 - Output Circuit
FIGURE 6 - Using Enable Pin as a High Speed Input
Path
UDG-92052
UDG-92053
UNITRODE INTEGRATED CIRCUITS
7 CONTINENTAL BLVD.
MERRIMACK, NH 03054
TEL. (603) 424-2410
FAX (603) 424-3460
4
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