參數(shù)資料
型號: U632H64BDK25
英文描述: NVRAM (EEPROM Based)
中文描述: NVRAM中(EEPROM的基礎)
文件頁數(shù): 13/14頁
文件大小: 155K
代理商: U632H64BDK25
13
November 01, 2001
U632H64
Low Average Active Power
The U632H64 has been designed to draw significantly
less power when E is LOW (chip enabled) but the
access cycle time is longer than 55 ns.
When E is HIGH the chip consumes only standby cur-
rent.
The overall average current drawn by the part depends
on the following items:
1. CMOS or TTL input levels
2. the time during which the chip is disabled (E HIGH)
3. the cycle time for accesses (E LOW)
4. the ratio of READs to WRITEs
5. the operating temperature
6. the power supply voltage level
1
2
3
28
27
26
4
5
6
7
8
9
10
11
25
24
23
22
21
20
19
18
12
13
14
17
16
15
+
0.1
μ
F
Bypas
s
100
μ
F
±
20 %
V
CAP
V
SS
Power
Supply
10 K
(optional,
see description HSB
nonvolatile store)
V
CCX
HSB
Figure 1: Automatic STORE Operation
Schematic Diagram
The information describes the type of component and shall not be considered as assured characteristics. Terms of
delivery and rights to change design reserved.
1
2
3
28
27
26
4
5
6
7
8
9
10
11
25
24
23
22
21
20
19
18
12
13
14
17
16
15
0.1
μ
F
Bypass
V
CAP
V
SS
Power
Supply
V
CCX
HSB
10 K
(optional,
see description HSB
nonvolatile store)
Figure 2: Disabeling Automatic STORES
Schematic Diagram
V
CAP
5.0 V
V
SWITCH
STORE inhibit
Power Up
RECALL
t
RESTORE
(24)
t
Disabeling Automatic STORES: STORE Cycle Inhibit and Automatic Power Up RECALL
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