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參數(shù)資料
| 型號： | U632H16 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PowerStore 2K x 8 nvSRAM |
| 中文描述： | PowerStore 2K × 8非易失 |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 224K |
| 代理商： | U632H16 |
U632H16
9
March 31, 2006
STK Control #ML0046
Rev 1.0
u: If the chip enable pulse width is less then t
a(E)
(see READ cycle) but greater than or equal to t
w(E)SR
, then the data may not be valid at
the end of the low pulse, however the STORE or RECALL will still be initiated.
v:
W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW
throughout. Addresses 1 through 6 are found in the mode selection table. Address 6 determines whether the U632H16 performs a STORE
or RECALL.
w: E must be used to clock in the address sequence for the Software controlled STORE and RECALL cycles.
Ai
E
DQi
Output
t
cR
t
w(E)SR
(34)
High Impedance
ADDRESS 1
VALID
VALID
t
dis(E)SR
(30)
Software Controlled STORE/RECALL Cycle
t, u, v, w
(E = HIGH after STORE initiation)
ADDRESS 6
(29)
(29)
t
h(A)SR
(35)
t
su(A)SR
(33)
Ai
E
DQi
Output
t
cR
t
w(E)SR
(34)
High Impedance
ADDRESS 1
VALID
VALID
ADDRESS 6
t
d(E)S
(31)
(32)
(29)
t
h(A)SR
(35)
t
su(A)SR
(33)
t
dis(E)SR
(30)
t
h(A)SR
(35)
t
su(A)SR
(33)
t
w(E)SR
(34)
t
d(E)S
(31)
t
h(A)SR
(35)
t
su(A)SR
(33)
(5)
t
dis(E)
Software Controlled STORE/RECALL Cycle
t, u, v, w
(E = LOW after STORE initiation)
(32)
t
d(E)R
t
d(E)R
t
cR
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| U632H16SC25G1 | PowerStore 2K x 8 nvSRAM |
| U632H16SC25Z0425G1 | PowerStore 2K x 8 nvSRAM |
| U632H16SK25G1 | PowerStore 2K x 8 nvSRAM |
| U632H64 | PowerStore 8K x 8 nvSRAM |
| U635H16 | PowerStore 2K x 8 nvSRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| U632H16BSC25 | 制造商:Cypress Semiconductor 功能描述: |
| U632H16BSC25G1 | 制造商:Cypress Semiconductor 功能描述: |
| U632H16BSC25G1TR | 制造商:Cypress Semiconductor 功能描述: |
| U632H16BSC25TR | 制造商:Cypress Semiconductor 功能描述: |
| U632H16BSK25 | 制造商:Cypress Semiconductor 功能描述: |
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