參數(shù)資料
型號: U62H64SK35G1
廠商: Electronic Theatre Controls, Inc.
元件分類: DRAM
英文描述: AUTOMOTIVE FAST 8K X 8 SRAM
中文描述: 汽車快速8K的× 8的SRAM
文件頁數(shù): 1/9頁
文件大?。?/td> 163K
代理商: U62H64SK35G1
April 20, 2004
1
U62H64
The U62H64 is a static RAM manu-
factured using a CMOS process
technology with the following ope-
rating modes:
- Read
- Standby
- Write
- Data Retention
The memory array is based on a
6-transistor cell.
The circuit is activated by the rising
edge of E2 (at E1 = L), or the falling
edge of E1 (at E2 = H). The
address and control inputs open
simultaneously.
According to the information of W
and G, the data inputs, or outputs,
are active. In a Read cycle, the
data outputs are activated by the
falling edge of G, afterwards the
data word read will be available at
the outputs DQ0 - DQ7. After the
address change, the data outputs
go High-Z until the new read infor-
mation is available. The data out-
puts have no preferred state. If the
memory is driven by CMOS levels
in the active state, and if there is no
change of the address, data input
and control signals W or G, the
operating current (at I
O
= 0 mA)
drops to the value of the operating
current in the Standby mode. The
Read cycle is finished by the falling
edge of E2 or W, or by the rising
edge of E1, respectively.
Data retention is guaranteed down
to 2 V.
With the exception of E1 and E2,
all inputs consist of NOR gates, so
that no pull-up/pull-down resistors
are required. This gate circuit
allows to achieve low power
standby requirements by activation
with TTL-levels too.
!
Fast 8192 x 8 bit static CMOS
RAM
!
35 ns Access Time
!
Bidirectional data inputs and data
outputs
!
Three-state outputs
!
Data retention mode at Vcc > 2V
!
Data retention current at 2 V:
< 3 μA (K-Type)
< 50
μA (A-Type)
!
Standby current
< 5 μA (K-Type)
< 100 μA (A-Type)
!
TTL/CMOS-compatible
!
Automatic reduction of power
dissipation in long Read or Write
cycles
!
Power supply voltage 5 V
!
Operating temperature ranges
-40 to 85 °C
-40 to 125
°
C
!
QS 9000 Quality Standard
!
ESD protection > 2000 V
(MIL STD 883C M3015.7)
!
Latch-up immunity > 200 mA
!
Package:
SOP28 (300 mil)
Pin Description
Signal Name
Signal Description
A0 - A12
DQ0 - DQ7
Address Inputs
Data In/Out
Chip Enable 1
Chip Enable 2
Output Enable
Write Enable
Power Supply Voltage
Ground
not connected
E1
E2
G
W
VCC
VSS
n.c.
Pin Configuration
1
n.c.
VCC
28
2
A12
W (WE)
27
4
A6
A8
25
5
A5
A9
24
3
A7
E2 (CE2)
26
6
A4
A11
23
7
A3
G (OE)
22
8
A2
A10
21
12
DQ1
DQ5
17
9
A1
E1 (CE1)
20
10
A0
DQ7
19
11
DQ0
DQ6
18
13
DQ2
DQ4
16
14
VSS
DQ3
15
SOP
Top View
Automotive Fast 8K x 8 SRAM
Features
Description
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