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參數(shù)資料
| 型號(hào)： | U4090B-N |
| 英文描述： | Low power dual voltage comparators |
| 中文描述： | U4090B氮[更新9 / 03。 34頁] |
| 文件頁數(shù)： | 6/34頁 |
| 文件大小： | 622K |
| 代理商： | U4090B-N |
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6
U4090B-N
4740A–CORD–09/03
DC Line Interface and
Supply-voltage
Generation
The DC line interface consists of an electronic inductance and a dual-port output stage
which charges the capacitors at V
MPS
and V
B
. The value of the equivalent inductance is
given by:
L = R
SENSE
C
IND
((R
DC
R
30
)/(R
DC
+ R
30
))
In order to improve the supply during worst-case operating conditions, two PNP current
sources - I
BOPT
and I
MPSOPT
- hand an extra amount of current to the supply voltages
when the NPNs in parallel are unable to conduct current.
A flowchart for the control of the current sources (Figure 5) shows how a priority for sup-
ply VMPS is achieved.
Figure 4.
DC Line Interface with Electronic Inductance and Generation of a Regulated and an Unregulated Supply
Figure 5.
Supply Capacitors CMPS and CB Are Charged with Priority on CMPS
-
+
+
-
+
-
V
L
SENSE
R
SENSE
< 5 mA
30 k
6.3 V
3.3 V
470 μF
3.3 V/
2 mA
7.0 V
=
=
< 5 mA
IND
10
C
IND
10 μF
I
BOPT
R
30
V
OFFS
R
DC
I
MPSOPT
V
MPS
V
MP
V
B
47 μF
220 μF
VSENSE - VB > 200 mV
VSENSE - VMPS > 200 mV
VB < 6.3 V
Charge CB
(IBOPT)
Charge CMPS
(IMPSOPT)
VMPS < 6.3 V
IBOPT = 0
Reduce IBOPT
(IMPSOPT = 0)
Y
N
Y
IMPSOPT = 0
N
N
N
Y
Y
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