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參數(shù)資料
| 型號(hào)： | U403 |
| 廠商： | Linear Integrated Systems |
| 英文描述： | LOW NOISE LOW DRIFT MONOLITHIC DUAL N CHANNEL JFET |
| 中文描述： | 低噪聲低漂移整體式雙N溝道JFET |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 26K |
| 代理商： | U403 |
Dual N-Channel JFET Switch
U401 – U406
FEATURES
Minimum System Error and Calibration
Low Drift With Temperature
Operates From Low Power Supply Voltages
High Output Impedance
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25
o
C unless otherwise specified)
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . . 50V
Gate Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Storage Temperature Range . . . . . . . . . . . . . -65
o
C to +200
o
C
Operating Temperature Range . . . . . . . . . . . -55
o
C to +150
o
C
Lead Temperature (Soldering, 10sec). . . . . . . . . . . . . +300
o
C
One Side
300mW
2.6mW/
o
C
Both Sides
500mW
5mW/
o
C
Power Dissipation (T
A
= 85
o
C)
Derate above 25
o
C
NOTE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ORDERING INFORMATION
Part
U401-6
XU401-6
Package
Hermetic TO-71
Sorted Chips in Carriers
Temperature Range
-55
o
C to +150
o
C
-55
o
C to +150
o
C
C ORPORATION
PIN CONFIGURATION
S2G1
D2
D1
G2
S1
TO-71
CJ2
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| U404 | LOW NOISE LOW DRIFT MONOLITHIC DUAL N CHANNEL JFET |
| U406 | LOW NOISE LOW DRIFT MONOLITHIC DUAL N CHANNEL JFET |
| U401 | LOW NOISE LOW DRIFT MONOLITHIC DUAL N CHANNEL JFET |
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