參數(shù)資料
型號: TZA3030HL
廠商: NXP SEMICONDUCTORS
元件分類: 數(shù)字傳輸電路
英文描述: SDH/SONET STM1/OC3 optical receiver
中文描述: RECEIVER, PQFP32
文件頁數(shù): 4/20頁
文件大?。?/td> 502K
代理商: TZA3030HL
1998 Aug 24
4
Philips Semiconductors
Objective specification
SDH/SONET STM1/OC3 optical receiver
TZA3030
PINNING
SYMBOL
PIN
TYPE
DESCRIPTION
AGND
V
CCA
AGND
DREF
V
CCA
AGND
IPhoto
1
2
3
4
5
6
7
ground
supply
ground
analog output bias voltage for PIN diode (V
CCA
); cathode should be connected to this pin
supply
analog supply voltage
ground
analog ground
analog input
current input; connect the anode of PIN diode to this pin; DC bias level is
1048 mV
ground
analog ground
ground
analog ground
analog input
bandwidth control pin; default bandwidth is 120 MHz; a resistor should be
connected between V
ref
(pin 11) and BWC (pin 10) to decrease bandwidth, or
between BWC (pin 10) and AGND to increase bandwidth
analog output band gap reference voltage; nominal value approximately 1.2 V
substrate
substrate pin; to be connected to AGND
ground
digital ground
analog input
test pin; not connected; not used in application
CMOS input
output select pin; when OUTSEL is HIGH, CML data outputs are active and
PECL data outputs are disabled; OUTSEL is pulled LOW if left unconnected,
PECL data outputs will then be active and CML data outputs disabled
ground
digital ground
supply
digital supply voltage
CML output
CML data output; OUTCML goes HIGH when current flows into IPhoto (pin 7)
CML output
CML compliment of OUTCML (pin 18)
supply
digital supply voltage
ground
digital ground
PECL output
PECL data output; OUTPECL goes HIGH when current flows into IPhoto (pin 7)
PECL output
PECL compliment of OUTPECL (pin 22)
ground
digital ground
ground
digital ground
PECL output
PECL-compatible LOS detection pin; LOS output is HIGH when the input signal
is below the user programmable threshold level
PECL output
PECL compliment of LOS (pin 26)
TTL output
CMOS-compatible LOS detection pin; the LOSTTL output is HIGH when the
input signal is below the user programmable threshold level
analog I/O
pin for setting input threshold level; nominal DC voltage is V
CCA
1.5 V;
threshold level set by connecting an external resistor between LOSTH and
V
CCA
or by forcing a current into LOSTH; default value for this resistor is 400 k
ground
analog ground
analog I/O
AGC monitor voltage; the internal AGC circuit can be disabled by applying an
external voltage to this pin
ground
analog ground
analog ground
analog supply voltage
analog ground
AGND
AGND
BWC
8
9
10
V
ref
SUB
DGND
RFTEST
OUTSEL
11
12
13
14
15
DGND
V
CCD
OUTCML
OUTQCML
V
CCD
DGND
OUTPECL
OUTQPECL
DGND
DGND
LOS
16
17
18
19
20
21
22
23
24
25
26
LOSQ
LOSTTL
27
28
LOSTH
29
AGND
AGC
30
31
AGND
32
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