參數(shù)資料
型號(hào)： TVP5150APBSR
廠商： Texas Instruments
文件頁數(shù)： 25/74頁
文件大?。?/td> 0K
描述： IC NTSC/PAL/SECAM DECODER 32TQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 1
類型： 視頻解碼器
應(yīng)用： 移動(dòng)電話，PDA，播放器
電壓 - 電源，模擬： 1.8V
電壓 - 電源，數(shù)字： 1.8V，3.3V
安裝類型： 表面貼裝
封裝/外殼： 32-TQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（5x5）
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面： 887 (CN2011-ZH PDF)
配用： TVP5150AEVM-ND - TVP5150AEVM
296-23058-ND - EVAL MODULE FOR DM642
TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
其它名稱： 296-16846-6
221
2.20.8 Luminance Processing Control #1 Register
Address
07h
Default
60h
7
6
5
4
3
2
1
0
2x luma output
enable
Pedestal not present
Disable raw
header
Luma bypass enabled
during vertical blanking
Luminance signal delay with respect to
chrominance signal
2x luma output enable:
0 = Output depends on bit 4, luminance bypass enabled during vertical blanking (default).
1 = Outputs 2x luma samples during the entire frame. This bit takes precedence over bit 4.
Pedestal not present:
0 = 7.5 IRE pedestal is present on the analog video input signal.
1 = Pedestal is not present on the analog video input signal (default).
Disable raw header:
0 = Insert 656 ancillary headers for raw data
1 = Disable 656 ancillary headers and instead force dummy ones (0x40) (default)
Luminance bypass enabled during vertical blanking:
0 = Disabled. If bit 7, 2x luma output enable, is 0, then normal luminance processing occurs and YCbCr
samples are output during the entire frame (default).
1 = Enabled. If bit 7, 2x luma output enable, is 0, then normal luminance processing occurs and YCbCr
samples are output during VACTIVE and 2x luma samples are output during VBLK. Luminance bypass
occurs for the duration of the vertical blanking as defined by registers 18h and 19h.
Luminance bypass occurs for the duration of the vertical blanking as defined by registers 18h and 19h.
Luma signal delay with respect to chroma signal in pixel clock increments (range 8 to +7 pixel clocks):
1111 = 8 pixel clocks delay
1011 = 4 pixel clocks delay
1000 = 1 pixel clocks delay
0000 = 0 pixel clocks delay (default)
0011 = 3 pixel clocks delay
0111 = 7 pixel clocks delay
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP5150APBSRG4 功能描述:視頻 IC Ultralo Pwr NTSC/PAL SECAM Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
TVP5150PBS 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 VERY LOW POWER VIDEO DECODER RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
TVP5150PBS 制造商:Texas Instruments 功能描述:IC DECODER VIDEO SMD
TVP5150PBSG4 功能描述:視頻 IC VERY LOW POWER VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
TVP5150PBSR 功能描述:視頻 IC Very Low Power Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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