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參數(shù)資料
| 型號： | TVP5010PFP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP80 |
| 封裝： | POWERPAD, PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 16/59頁 |
| 文件大小： | 250K |
| 代理商： | TVP5010PFP |
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2–11
2.3.2
I2C Read Operation
The read operation has two phases, the address phase and the data phase. In the address phase, the I2C
master initiates a write operation to the TVP5010 by generating a start condition followed by the TVP5010’s
I2C address (101110X). The address is in MSB first bit order followed by a 0 to indicate a write cycle. After
receiving a TVP5010 acknowledge, the I2C master sends a subaddress of the register or the block of
registers where it will read. The TVP5010 acknowledges the receipt of the address upon completion of each
transfer. The I2C master ends a read operation by generating a stop condition. During the data phase, the
I2C master initiates a read operation to the TVP5010 by generating a start condition followed by the
TVP5010’s I2C address (101110X). The address is in MSB first bit order followed by a 1 to indicate a read
cycle. The I2C master acknowledges the receipt of each byte upon completion of each transfer. After the
TVP5010 transfers the last byte, the I2C master ends the read operation by generating a not acknowledge
followed by a stop condition.
Read Phase 1
0
I2C Start (Master)
S
7
6
5
4
3
2
1
0
I2C General Address (Master)
1
0
1
0
X
0
9
I2C Acknowledge (Slave)
A
7
6
5
4
3
2
1
0
I2C Write Register Address (Mas)
Addr
9
I2C Acknowledge (Slave)
A
0
I2C Stop (Master)
P
Read Phase 2
0
I2C Start (Master)
S
7
6
5
4
3
2
1
0
I2C General Address (Master)
1
0
1
0
X
1
9
I2C Acknowledge (Slave)
A
7
6
5
4
3
2
1
0
I2C Read Data (Slave)
Data
9
I2C Acknowledge (Slave)
/A
0
I2C Stop (Master)
P
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參數(shù)描述 |
|---|---|
| TVP5020 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL VIDEO DECODER |
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| TVP5020PFC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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