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參數(shù)資料
| 型號： | TUA4401 |
| 英文描述： | FM Receiver Circuit |
| 中文描述： | 調(diào)頻接收機(jī)電路 |
| 文件頁數(shù)： | 21/32頁 |
| 文件大小： | 832K |
| 代理商： | TUA4401 |
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Specification
TUA 4401
Semiconductor Group
22
Status, Subaddress 00H
MSB
LSB
MSB
LSB
Function
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
these bits must be = 0
0
1
opendrain Port_2 output = high level
0
0
opendrain Port_2 output = low level
0
1
opendrain Port_1 output = high level
0
0
opendrain Port_1 output = low level
0
1
Loopamp currentsource high (I
LOOPAMP
=2.4mA) for
high speed tuning
0
0
Loopamp currentsource low (I
LOOPAMP
=1.2mA)
7 bit AD Converter enabled for single mode, stop
0
0
0
1
0
1
0
1
7 bit AD Converter enabled for single mode start. To
restart single mode write the same bits once more.
0
0
1
1
7 bit AD Converter enabled for continuos mode run.
0
x
x
1
7 bit AD Converter enabled for single or continous mode
0
x
x
0
7 bit AD Converter disabled for single and continous
mode
0
1
IF_DAC4 enabled (see subaddress 07H)
0
0
IF_DAC4 disabled (see subaddress 07H)
0
1
Phase detector 1
0
0
Phase detector 0
0
1
1
Chargepump current I
cp3
= 4mA
Chargepump current I
cp2
= 2mA
Chargepump current I
cp1
= 1mA
Chargepump current I
cp0
= 500uA
Chargepump enabled
0
1
0
0
0
1
0
0
0
0
1
0
0
Chargepump disabled
Subaddress 01H, R_Counter and
Subaddress 02H, N_Counter
MSB
LSB
MSB
LSB
Function
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Divider by 65535
0
0
0
0
0
1
1
1
1
1
0
1
0
0
0
0
Divider by 2000
0
0
0
0
0
1
0
0
1
1
0
0
1
1
1
0
Divider by 1230
0
0
0
0
0
0
1
1
1
1
1
0
1
0
0
0
Divider by 1000
0
0
0
0
0
0
1
0
0
1
1
0
0
1
1
1
Divider by 615
0
0
0
0
0
0
0
0
0
1
1
0
0
1
0
0
Divider by 100
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
Divider by 10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
Divider by 2
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