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參數(shù)資料
| 型號： | TU24C64CP3 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | CMOS IC 2-WIRE BUS 64K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 8K X 8 BIT EEPROM |
| 中文描述： | 我葷的CMOS 2線總線64K的電可擦除可編程ROM的8K的× 8位EEPROM |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 46K |
| 代理商： | TU24C64CP3 |
CMOS I2C 2-WIRE BUS
64K ELECTRICALLY ERASABLE PROGRAMMABLE ROM
8K X 8 BIT EEPROM
Turbo IC, Inc.
24C64
SERIAL DATA (SDA)
SDA
is a bidirectional pin used to transfer data
in and out of the Turbo IC 24C64. The pin is an
open-
WRITE PROTECT (WP)
When the write protect input is connected to Vcc,
the upper quadrant of memory (1800-1FFFH) is
protected against write operations. For normal
write operation, the write protect pin should be
grounded. When this pin is left unconnected, WP
is interpreted as zero.
PIN DESCRIPTION
DEVICE ADDRESSES (A2-A0)
The address inputs are used to define the 3 least
significant bits of the 7-bit device address code -
1010 (A2) (A1) (A0). These pins can be con-
nected either high or low. A maximum of eight
Turbo IC 24C64 can be connected in parallel,
each with a unique device address. When these
pins are left unconnected, the device addresses
are interpreted as zero.
drain output. A pullup resistor must be connected
from SDA to Vcc.
S
ERIAL CLOCK (SCL)
The SCL input synchronizes the data on the SDA
bus. It is used in conjunction with SDA to define
the start and stop conditions. It is also used in
conjunction with SDA to transfer data to and from
the Turbo IC 24C64.
1
2
3
4
5
6
7
8
A0
A1
A2
GND
VCC
WP
SCL
SDA
8 pin PDIP
1
2
3
4
5
6
7
8
A0
A1
A2
GND
VCC
WP
SCL
SDA
8 pin SOIC
PIN DESCRIPTION
DESCRIPTION
:
The Turbo IC 24C64 is a serial 64K EEPROM fabricated
with Turbo’s proprietary, high reliability, high performance
CMOS technology. It’s 64K of memory is organized as 8,192
x 8 bits. The memory is configured as 256 pages with each
page containing 32 bytes. This device offers significant ad-
vantages in low power and low voltage applications.
The Turbo IC 24C64 uses the extended I2C addressing pro-
tocol and 2-wire serial interface which includes a bidirec-
tional serial data bus synchronized by a clock. It offers a
flexible byte write and a faster 32-byte page write. The data
in the upper quadrant of memory can be protected by a
write protect pin.
The Turbo IC 24C64 is assembled in either a 8-pin PDIP or
8-pin SOIC package. Pin #1 (A0), #2 (A1), and #3 (A2) are
device address input pins which are hardwired by the user.
Pin #4 is the ground (Vss). Pin #5 is the serial data (SDA)
pin used for bidirectional transfer of data. Pin #6 is the serial
clock (SCL) input pin. Pin #7 is the write protect (WP) input
pin, and Pin #8 is the power supply (Vcc) pin.
All data is serially transmitted in bytes (8 bits) on the SDA
bus. To access the Turbo IC 24C64 (slave) for a read or
write operation, the controller (master) issues a start condi-
tion by pulling SDA from high to low while SCL is high. The
master then issues the device address byte which consists
of 1010 (A2) (A1) (A0) (R/W). The 4 most significant bits
(1010) are a device type code signifying an EEPROM de-
vice. The A[2:0] bits represent the input levels on the 3 de-
vice address input pins. The read/write bit determines
whether to do a read or write operation. After each byte is
transmitted, the receiver has to provide an acknowledge by
pulling the SDA bus low on the ninth clock cycle. The ac-
knowledge is a handshake signal to the transmitter indicat-
ing a successful data transmission.
FEATURES :
Extended Power Supply Voltage
Single Vcc for Read and Programming
(Vcc = 2.7 V to 5.5 V)
Low Power (Isb = 2μa @ 5.5 V)
Extended I2C Bus, 2-Wire Serial Interface
Support Byte Write and Page Write (32 Bytes)
Automatic Page write Operation (maximum 10 ms)
Internal Control Timer
Internal Data Latches for 32 Bytes
Hardware Data Protection by Write Protect Pin
High Reliability CMOS Technology with EEPROM Cell
Endurance : 1,000,000 Cycles
Data Retention : 100 Y
ears
1
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