參數(shù)資料
型號: TTSI4K32T
英文描述: 4096-Channel, 32-Highway Time-Slot Interchanger
中文描述: 4096通道,32道時隙交換器
文件頁數(shù): 6/64頁
文件大?。?/td> 1105K
代理商: TTSI4K32T
TTSI4K32T
4096-Channel, 32-Highway Time-Slot Interchanger
Data Sheet
June 2000
6
Lucent Technologies Inc.
Functional Description
(continued)
The device capabilities include several test features for board and device diagnostics.
I
Test-pattern checking on input time slots (PRBS, QRSS, or a fixed byte).
I
Test-pattern generation on output time slots (PRBS, QRSS, or a fixed byte).
I
JTAG on all I/O.
I
Software-controlled BIST of data store and connection store memory.
I
TEST pin for isolating the TTSI4K32T during board test.
The microprocessor interface supports two modes of operation, synchronous and asynchronous. These modes are
selected based on the MM input pin. Both modes provide an 8-bit demultiplexed address and data bus. Fifteen
address pins allow direct access to the 32 Kbyte address space. This interface provides direct access to the control
registers and data store and connection store memories.
The TTSI4K32T is fabricated using a low-power, high-density, CMOS process that nominally operates at 3.3 V with
TTL switching thresholds and 5 V tolerance on the inputs and outputs. A basic block diagram of the architecture is
shown in Figure 1.
5-5780(F).br.1
Figure 1. Block Diagram of the TTSI4K32T
CONNECTION
STORE
MICROPROCESSOR INTERFACE
TRANSMIT
HIGHWAYS
DATA
STORE
JTAG
PLL
AND
CK
LOGIC
RXD0
RXD1
RXD2
RXD3
RXD30
RXD31
CK
CKSPD0
CKSPD1
CKSPD2
FSYNC
MM
TXD0
TXOE0
TXD1
TXOE1
TXD31
TXOE31
TCK
TDI
TMS
TRST
TDO
RESET
INT
TEST
A[14—0]
D[7—0]
CS
AS
DS
R/W
DT
RECEIVE
HIGHWAYS
PCLK
DATA STORE
ADDRESS
TDM
DATA
TDM
DATA
HOST ADDRESS/DATA BUS
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