參數(shù)資料
型號(hào)： TSS901EASC
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： Tripple Point to Point IEEE 1355 High Speed Controller
中文描述： 3 CHANNEL(S), 200M bps, SERIAL COMM CONTROLLER, PQFP196
封裝： MQFPL-196
文件頁(yè)數(shù)： 7/31頁(yè)
文件大?。?/td> 292K
代理商： TSS901EASC
7
TSS901E
Rev. C
–
24-Aug-01
Register Set
This chapter describes the TSS901E registers which can be read or written by the HOCI
or via the link (in case the "control by link" is enabled) to control TSS901E operations.
All TSS901E control operations are performed by writes or reads of the respective regis-
ters. Most of the control operations are obvious from the content of the registers.
General Conventions:
bit 0 (D0) = least significant bit,
bit 7 (D7) = most significant bit (or bit 15 resp. bit 31)
D x:0 means data bit x until bit 0.
Access by HOCI: HOCI data transfer
Big/Little endian selection of the HOCI is done using a special pin (HOSTBIGE) of the
TSS901E. By connecting this pin to either Vcc or GND the HOCI is configured to be in
little or big endian mode as follows:
When Signal HOSTBIGE = '0' (GND), the HOCI data port is in little endian mode.
When Signal HOSTBIGE = '1' (Vcc), the HOCI data port is in big endian mode.
Little endian mode selected:
8 bit data port (default after reset)
–
register byte 0 is connected with pin HDATA0 - HDATA7
16 bit data port
–
register byte 0 is connected with pin HDATA0 - HDATA7
–
register byte 1 is connected with pin HDATA8 - HDATA15
32 bit data port
–
register byte 0 is connected with pin HDATA0 - HDATA7
–
register byte 1 is connected with pin HDATA8 - HDATA15
–
register byte 2 is connected with pin HDATA16 - HDATA23
–
register byte 3 is connected with pin HDATA24 - HDATA31
Big endian mode selected:
8 bit data port (default after reset)
–
register byte 0 is connected with pin HDATA24 - HDATA31
16 bit data port
–
register byte 0 is connected with pin HDATA24 - HDATA31
–
register byte 1 is connected with pin HDATA16 - HDATA23
32 bit data port
–
register byte 0 is connected with pin HDATA24 - HDATA31
–
register byte 1 is connected with pin HDATA16 - HDATA23
–
register byte 2 is connected with pin HDATA8 - HDATA15
–
register byte 3 is connected with pin HDATA0 - HDATA7
The registers of the TSS901E are 1, 2 or 4 Bytes wide. That means, if the HOCI data
port is in 8 bit mode, 4 read or write accesses are necessary to access a 4 Byte register
(e. g. the interrupt mask register). In 16/32 bit mode the data bits 31 - 8 are '0' if an 8 bit
register is read.
相關(guān)PDF資料
PDF描述
TSS901EMA-E Tripple Point to Point IEEE 1355 High Speed Controller
TSS901EMC-E Tripple Point to Point IEEE 1355 High Speed Controller
TSS901E Tripple Point to Point IEEE 1355 High Speed Controller
TST-J(20PR) KABELSCHUH TYP J Inhalt pro Packung: 20 Stk.
TST-K(20PR) KABELSCHUH TYP K Inhalt pro Packung: 20 Stk.
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