參數資料
型號: TS86101G2BVGL
廠商: ATMEL CORP
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 10-BIT DAC, PBGA255
封裝: CBGA-255
文件頁數: 37/57頁
文件大?。?/td> 1119K
代理商: TS86101G2BVGL
42
5343C–BDC–03/06
TS86101G2B
Figure 12-10. DSP Output Clock Implementation (General Case – Values Given For Information Only)
Notes:
1. The 100
differential resistor is required for impedance matching of the output buffer of the
MUXDAC. It must be placed right after the MUXDAC buffer and not at the end of the line (i.e.
close to the load) because of the biasing resistors used after the AC coupling capacitors (it
would change the biasing).
2. The 100
differential resistor, the AC coupling capacitors and the resistors used for the bias-
ing should all be placed as close as possible to the load.
3. Even without 100
differential resistor, the impedance of the output buffer is sufficient. In that
case the swing of DSP output clock is twice larger and common mode remains unchanged.
VCCD
DGND
10 nF
DSP_CK_T
DSP_CK_F
50
50
Lines
High Impedence
Load
100
1 K
10 nF
GND
1.5V
3.3V
100 K
As close as possible to the load
相關PDF資料
PDF描述
TS86101G2BMGS SERIAL INPUT LOADING, 10-BIT DAC, PBGA255
TS86101G2BMGS PARALLEL, WORD INPUT LOADING, 10-BIT DAC, CBGA255
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TS86101G2BCGL PARALLEL, WORD INPUT LOADING, 10-BIT DAC, CBGA255
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