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參數(shù)資料
| 型號(hào)： | TS8388BCG |
| 廠商： | ATMEL CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA72 |
| 封裝： | 1.27 MM PITCH, HEAT SINK, CERAMIC, BGA-72 |
| 文件頁數(shù)： | 12/43頁 |
| 文件大?。?/td> | 1530K |
| 代理商： | TS8388BCG |
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TS8388BG
Product Specification
TABLE OF CONTENTS
1.
SIMPLIFIED BLOCK DIAGRAM....................................................................................................................................3
2.
FUNCTIONAL DESCRIPTION ........................................................................................................................................3
3.
SPECIFICATIONS..............................................................................................................................................................4
3.1.
ABSOLUTE MAXIMUM RATINGS (SEE NOTES BELOW).................................................................................................................... 4
3.2.
RECOMMENDED CONDITIONS OF USE ............................................................................................................................................. 4
1.3.
ELECTRICAL OPERATING CHARACTERISTICS................................................................................................................................. 5
1.4.
TIMING DIAGRAMS................................................................................................................................................................................ 9
1.5.
EXPLANATION OF TEST LEVELS ...................................................................................................................................................... 10
1.6.
FUNCTIONS DESCRIPTION................................................................................................................................................................ 10
1.7.
DIGITAL OUTPUT CODING ................................................................................................................................................................. 10
4.
PACKAGE DESCRIPTION. ............................................................................................................................................11
4.1.
TS8388BG PIN DESCRIPTION............................................................................................................................................................ 11
4.2.
TS8388BG PINOUT OF CBGA72 PACKAGE ...................................................................................................................................... 12
4.3.
TS8388BG CAPACITIES AND RESISTANCES IMPLANT .................................................................................................................. 13
4.4.
OUTLINE DIMENSIONS - 72 PINS CBGA ........................................................................................................................................... 14
4.5.
THERMAL AND MOISTURE CHARACTERISTICS................................................................................................................................... 15
5.
TYPICAL CHARACTERIZATION RESULTS .............................................................................................................16
5.1.
STATIC LINEARITY – FS = 50 MSPS / FIN = 10 MHZ......................................................................................................................... 16
5.2.
EFFECTIVE NUMBER OF BITS VERSUS POWER SUPPLIES VARIATION ..................................................................................... 17
5.3.
TYPICAL FFT RESULTS ...................................................................................................................................................................... 18
5.4.
SPURIOUS FREE DYNAMIC RANGE VERSUS INPUT AMPLITUDE ................................................................................................ 19
5.5.
DYNAMIC PERFORMANCE VERSUS ANALOG INPUT FREQUENCY ............................................................................................. 21
5.6.
EFFECTIVE NUMBER OF BITS (ENOB) VERSUS SAMPLING FREQUENCY .................................................................................. 22
5.7.
SFDR VERSUS SAMPLING FREQUENCY ......................................................................................................................................... 22
5.8.
TS8388BG ADC PERFORMANCES VERSUS JUNCTION TEMPERATURE ..................................................................................... 23
5.9.
TYPICAL FULL POWER INPUT BANDWIDTH .................................................................................................................................... 24
5.10.
ADC STEP RESPONSE................................................................................................................................................................... 25
6.
DEFINITION OF TERMS ................................................................................................................................................26
7.
TS8388BG MAIN FEATURES .........................................................................................................................................28
7.1.
TIMING INFORMATIONS ..................................................................................................................................................................... 28
7.2.
PRINCIPLE OF DATA READY SIGNAL CONTROL BY DRRB INPUT COMMAND............................................................................ 29
7.3.
ANALOG INPUTS (VIN) (VINB)............................................................................................................................................................ 29
7.4.
CLOCK INPUTS (CLK) (CLKB) ............................................................................................................................................................ 30
7.5.
NOISE IMMUNITY INFORMATIONS.................................................................................................................................................... 33
7.6.
DIGITAL OUTPUTS .............................................................................................................................................................................. 33
7.7.
OUT OF RANGE BIT ............................................................................................................................................................................ 36
7.8.
GRAY OR BINARY OUTPUT DATA FORMAT SELECT...................................................................................................................... 36
7.9.
DIODE PIN K1....................................................................................................................................................................................... 36
7.10.
ADC GAIN CONTROL PIN K6 ......................................................................................................................................................... 37
8.
EQUIVALENT INPUT / OUTPUT SCHEMATICS ......................................................................................................38
8.1.
EQUIVALENT ANALOG INPUT CIRCUIT AND ESD PROTECTIONS ................................................................................................ 38
8.2.
EQUIVALENT ANALOG CLOCK INPUT CIRCUIT AND ESD PROTECTIONS................................................................................... 38
8.3.
EQUIVALENT DATA OUTPUT BUFFER CIRCUIT AND ESD PROTECTIONS .................................................................................. 39
ADC GAIN ADJUST EQUIVALENT INPUT CIRCUITS AND ESD PROTECTIONS.......................................................................................... 39
8.5.
GORB EQUIVALENT INPUT SCHEMATIC AND ESD PROTECTIONS.............................................................................................. 40
8.6.
DRRB EQUIVALENT INPUT SCHEMATIC AND ESD PROTECTIONS .............................................................................................. 40
9.
TSEV8388BG : DEVICE EVALUATION BOARD........................................................................................................41
10.
ORDERING INFORMATION .....................................................................................................................................42
10.1.
PACKAGE DEVICE .......................................................................................................................................................................... 42
10.2.
EVALUATION BOARD ..................................................................................................................................................................... 42
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| TS8388BCGL | 制造商:e2v technologies 功能描述:ADC 8-BIT 1 GSPS - Trays |
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