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參數(shù)資料
| 型號： | TS83102G0BMGS |
| 廠商： | ATMEL CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CBGA152 |
| 封裝： | HERMATIC, CI-CGA-152 |
| 文件頁數(shù)： | 49/52頁 |
| 文件大?。?/td> | 1548K |
| 代理商： | TS83102G0BMGS |
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6
5360A–BDC–06/05
TS83102G0BMGS
Notes:
1. Differential output buffers impedance = 100
differential (50 single-ended). See Figure 9-7 starting on page 42.
2. Histogram testing at Fs = 1 Gsps, Fin = 100 MHz, DNLrms is a component of quantization noise.
3. Histogram testing at Fs = 50 Msps, Fin = 25 MHz
4. This range of gain can be set to "1" by using the gain adjust function.
Logic compatibility (depending on V
PLUSD value)
LVDS (V
PLUSD = 1.4 V typical)
Output levels 50
transmission lines, 100
(2 x 50
) differentially terminated
- logic low
- logic high
- swing (each single-ended output)
- common mode ...... max V
PLUSD = 1.525V
...... typ VPLUSD = 1.45V
...... min VPLUSD = 1.375V
4
VOL
V
OH
VOH - VOL
825
200
1190
1125
1090
1310
230
1200
1575
300
1275
1210
mV
DC Accuracy
DNLrms (2)
4
DNLrms
0.50
0.53
0.55
LSB
Differential non-linearity (3)
1
DNL+
1.5
2
LSB
Integral non-linearity (3)
1
INL-
- 4.0
- 2.4
LSB
Integral non-linearity (3)
1INL+
2.4
4.0
LSB
Gain central value (4)
1
0.89
0.94
1.1
Gain error drift
4
23
35
ppm/°C
Input offset voltage
1
- 10
10
mV
3.3
Electrical Operating Characteristics (Continued)
V
CC = 5V ; VPLUSD = 0V (unless otherwise specified). ADC performances are independent of VPLUSD common mode
voltage and performances are guaranteed within the limits of the specified V
PLUSD range (from -0.9V to 1.7V);
V
EE = DVEE = -5V; VIN - VINB = 500 mVpp (full-scale single-ended or differential input);
clock inputs differential driven; analog-input single-ended driven.
Parameter
Test
Level
Symbol
Min
Typ
Max
Unit
3.4
AC Electrical Characteristics at Ambient and Hot Temperatures (T
J Max)
Parameter
Test
Level
Symbol
Min
Typ
Max
Unit
AC Analog Inputs
Full power input bandwidth (1)
4
FPBW
3.3
GHz
Small signal input bandwidth (10% full-scale) (1)
4
SSBW
3.5
GHz
Gain flatness (2)
4
BF
± 0.2
± 0.3
dB
Input voltage standing wave ratio (3)
4
VSWR
1.1 :1
1.2:1
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相關(guān)代理商/技術(shù)參數(shù) |
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| TS83102G0BVGL | 制造商:e2v technologies 功能描述:ADC SGL 2GSPS 10-BIT PARALLEL 152CBGA - Trays |
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| TS831-3I | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MICROPOWER VOLTAGE SUPERVISOR RESET ACTIVE LOW |
| TS831-3ID | 功能描述:監(jiān)控電路 2.71V Micropower AL RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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