參數(shù)資料
型號: TS80C52X2-ECED
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, MICROCONTROLLER, PQFP44
封裝: VQFP-44
文件頁數(shù): 4/56頁
文件大小: 689K
代理商: TS80C52X2-ECED
Rev. C - Aug. 31, 1999
12
TS80C52X2
ASSEMBLY LANGUAGE
; Block move using dual data pointers
; Destroys DPTR0, DPTR1, A and PSW
; note: DPS exits opposite of entry state
; unless an extra INC AUXR1 is added
;
00A2
AUXR1 EQU 0A2H
;
0000 909000MOV DPTR,#SOURCE
; address of SOURCE
0003 05A2 INC
AUXR1
; switch data pointers
0005 90A000 MOV DPTR,#DEST
; address of DEST
0008
LOOP:
0008 05A2 INC
AUXR1
; switch data pointers
000A E0
MOVX A,@DPTR
; get a byte from SOURCE
000B A3
INC
DPTR
; increment SOURCE address
000C 05A2 INC
AUXR1
; switch data pointers
000E F0
MOVX @DPTR,A
; write the byte to DEST
000F A3
INC
DPTR
; increment DEST address
0010 70F6 JNZ
LOOP
; check for 0 terminator
0012 05A2 INC
AUXR1
; (optional) restore DPS
INC is a short (2 bytes) and fast (12 clocks) way to manipulate the DPS bit in the AUXR1 SFR. However,
note that the INC instruction does not directly force the DPS bit to a particular state, but simply toggles it.
In simple routines, such as the block move example, only the fact that DPS is toggled in the proper sequence
matters, not its actual value. In other words, the block move routine works the same whether DPS is '0' or '1'
on entry. Observe that without the last instruction (INC AUXR1), the routine will exit with DPS in the
opposite state.
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