參數(shù)資料
型號(hào)： TS80C32X2-VCEB
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 40 MHz, MICROCONTROLLER, PDIP40
封裝： VQFP-44
文件頁(yè)數(shù)： 6/56頁(yè)
文件大?。?/td> 689K
代理商： TS80C32X2-VCEB
14
Rev. C - Aug. 31, 1999
TS80C52X2
Figure 4. Auto-Reload Mode Up/Down Counter (DCEN = 1)
6.3.2 Programmable Clock-Output
In the clock-out mode, timer 2 operates as a 50%-duty-cycle, programmable clock generator (See Figure 5) . The
input clock increments TL2 at frequency FOSC/2. The timer repeatedly counts to overflow from a loaded value.
At overflow, the contents of RCAP2H and RCAP2L registers are loaded into TH2 and TL2. In this mode, timer
2 overflows do not generate interrupts. The formula gives the clock-out frequency as a function of the system
oscillator frequency and the value in the RCAP2H and RCAP2L registers :
For a 16 MHz system clock, timer 2 has a programmable frequency range of 61 Hz
(FOSC/2
16) to 4 MHz (F
OSC/4). The generated clock signal is brought out to T2 pin (P1.0).
Timer 2 is programmed for the clock-out mode as follows:
q
Set T2OE bit in T2MOD register.
q
Clear C/T2 bit in T2CON register.
q
Determine the 16-bit reload value from the formula and enter it in RCAP2H/RCAP2L registers.
q
Enter a 16-bit initial value in timer registers TH2/TL2. It can be the same as the reload value or a different
one depending on the application.
(DOWN COUNTING RELOAD VALUE)
C/T2
TF2
TR2
T2
EXF2
TH2
(8-bit)
TL2
(8-bit)
RCAP2H
(8-bit)
RCAP2L
(8-bit)
FFh
(8-bit)
FFh
(8-bit)
TOGGLE
(UP COUNTING RELOAD VALUE)
TIMER 2
INTERRUPT
XTAL1
:12
FOSC
FXTAL
0
1
T2CONreg
T2EX:
if DCEN=1, 1=UP
if DCEN=1, 0=DOWN
if DCEN = 0, up counting
(:6 in X2 mode)
Clock
OutFrequency
–
F
osc
4
65536
RCAP2H
–
RCAP2L
()
×
--------------------------------------------------------------------------------------
=
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