參數資料
型號: TS68HC901CP4
廠商: 意法半導體
英文描述: HCMOS MULTI-FUNCTION PERIPHERAL
中文描述: HCMOS多功能外設
文件頁數: 18/42頁
文件大?。?/td> 369K
代理商: TS68HC901CP4
in the pulse width measurement mode is shown in
Figure 12.
Thepulse width measurement modefunctions simi-
larlyto the delay mode, with the auxiliary control si-
gnal acting as an enable to the timer. When the
controlsignal isactive,theprescaler andmaincoun-
ter are allowed to operate. When the control signal
isnegated, the timer is stopped.So, the widthofthe
active pulse onTAI orTBI is measured by thenum-
berof timer counts which occur while the timerisal-
lowedto operate.
The active stateof the auxiliary input line is defined
by the associated interrupt channel’s edgebit in the
active edge register (AER). GPIP4of theAER isthe
edge bit associated with TAI and GPIP3isassocia-
tedwith TBI.Whentheedge bitisaone, theauxiliary
input willbeactive high, enabling the timerwhile the
input signal is at a high level. If the edge bit is low,
theauxiliary inputwillbeactive low andthetimerwill
operate while the input signal is at a lowlevel.
The state of the active edgebit also specifies whe-
ther a zero-to-one transition or a one-to-zero trans-
itionofthe auxiliaryinputpinwillproduceaninterrupt
when the interrupt channel is enabled. In normal o-
peration, programming the active edgebit to a one
will produce an interrupt on the zero-to-one trans-
itionof the associated input signal. Alternately, pro-
gramming the edge bit to a zero will produce an in-
terrupt on the one-to-zero transition of the input si-
gnal. However, in the pulse width measurement
mode, theinterrupt generated bya transition on TAI
or TBI will occur on the opposite transition as that
normally defined by the edgebit.
For example, in the pulse width measurement
mode, if theedge bit is a one, the timer willbe allo-
wed torunwhiletheauxiliary inputTAIis high.When
TAI transitions from high to low, the timer will stop
and,if the interrupt channel is enabled, an interrupt
will occur. By having the interrupt occur on the one-
to-zero transition instead of the zero-to-one trans-
ition, the processor will be interrupted when the
pulse being measured has terminatedandthewidth
of the pulse is available from the timer. Therefore,
the timersact like a divide-by-prescaler that can be
programmed by the timer data register and the ti-
mer’s A and Bcontrol register.
After reading the contents of the timer, the main
counter must be reinitialized by writing to the timer
dataregister to allow consecutive pulses tobemea-
sured. If the timeris written after the auxiliary input
signalisactive, thetimerwill count fromthe previous
contents of the timer data register until it counts
through 01 (hexadecimal). At the time, the main
counter isloaded with thevalue from the timer data
register, a timeoutpulseisgenerated whichwilltog-
Figure 12 :
TS68HC901
18/42
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