參數(shù)資料
型號： TS68HC901CFN5
廠商： 意法半導體
英文描述： HCMOS MULTI-FUNCTION PERIPHERAL
中文描述： HCMOS多功能外設
文件頁數(shù)： 9/42頁
文件大?。?/td> 369K
代理商： TS68HC901CFN5
INTERRUPTSTRUCTURE
In a 68000 system, the CMFP will be assigned to
one of the seven possible interrupt levels. All inter-
rupt service requests from the CMFP’s 16 interrupt
channels willbepresented atthislevel.Although,as
an interrupt controller, the CMFPwill internally prio-
ritize its 16 interrupt sources. Additional interrupt
sources may be placed at the same interrupt level
by daisy-chaining multiple CMFPs. The CMFPswill
be prioritized by their position in the chain.
INTERRUPTPROCESSING
Each CMFP provides individual interrupt capability
for its various functions. When an interrupt is recei-
vedononeoftheexternal interrupt channels or from
one of theeight internal sources, the CMFP will re-
quest interrupt service. The 16 interrupt channels
areassignedafixedpriorityso thatmultiple pending
interrupts are servicedaccording to theirrelative im-
portance. Since the CMFP can internally generate
16vectornumbers, theuniquevectornumber which
corresponds to the highest priority channel that as
a pending interrupt ispresented totheprocessordu-
ring an interrupt acknowledge cycle. This unique
vector number allows theprocessor to immediately
begin execution of the interrupt handler for theinter-
rupt source, decreasing interrupt latency time.
INTERRUPT CHANNEL PRIORITIZATION
The 16 interrupt channels are prioritized as shown
in figure5. General purpose interrupt 7 (I7) is thehi-
ghest priority interrupt channel and I0 is the lowest
priority channel. Pendinginterruptsarepresented to
the CPU in order of priority unless they have been
masked off. By selectively masking interrupts, the
channel are in effect re-prioritized.
INTERRUPT VECTOR NUMBER FORMAT
During an interrupt acknowledge cycle, a unique 8-
bit vector number is presented to thesystemwhich
corresponds tothe specific interrupt source which is
requesting service. The format of the vector is
shown in figure 6. The most significant four bits of
the interruptvectornumber are userprogrammable.
These bits are set by writing the upper four bits of
the vector register which is shown in figure 7. The
low order bits are generated internally by the
TS68HC901. Note that the binary channel number
shown in figure5 corresponds to the low order bits
of thevector number associated with each channel.
Figure 9
: Interrupt Channel
Prioritization
Priority
HIGHEST
Channel
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
Description
LOWEST
General Purpose Interrupt 7(I7)
General Purpose Interrupt 6(I6)
Timer A
Receive Buffer Full
Receive Error
Transmit Buffer Empty
Transmit Error
Timer B
General Purpose Interrupt 5(I5)
General Purpose Interrupt 4(I4)
Timer C
Timer D
General Purpose Interrupt 3(I3)
General Purpose Interrupt 2(I2)
General Purpose Interrupt 1(I1)
General Purpose Interrupt 0(I0)
Figure 5 : Interrupt Channel Prioritization
TS68HC901
9/42
相關PDF資料
PDF描述
TS68HC901CFN8 HCMOS MULTI-FUNCTION PERIPHERAL
TS68HC901CP4 HCMOS MULTI-FUNCTION PERIPHERAL
TS68HC901CP5 HCMOS MULTI-FUNCTION PERIPHERAL
TS68HC901CP8 HCMOS MULTI-FUNCTION PERIPHERAL
TS68HC901 HCMOS Multi-Function Peripheral(HCMOS多功能外圍)
相關代理商/技術參數(shù)
參數(shù)描述
TS68HC901CFN8 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL
TS68HC901CP4 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL
TS68HC901CP5 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL
TS68HC901CP8 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HCMOS MULTI-FUNCTION PERIPHERAL
TS6A 制造商:YAMAICHI 制造商全稱:Yamaichi Electronics Co., Ltd. 功能描述:Modular Jacks
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*