參數(shù)資料
型號(hào): TS68020VR20
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: DC-DC Converter; Supply Voltage:48V; Output Voltage:12V; Number of Outputs:1; Power Rating:350W; Mounting Type:PC Board; Efficiency:94%; External Depth:2.40"; External Height:0.50"; External Width:2.28"; Isolation Voltage:1500V RoHS Compliant: Yes
中文描述: 32-BIT, 20 MHz, MICROPROCESSOR, CPGA114
封裝: CERAMIC, PGA-114
文件頁數(shù): 8/45頁
文件大?。?/td> 1256K
代理商: TS68020VR20
8
TS68020
2115A–HIREL–07/02
This device contains protective circuitry against damage due to high static voltages or
electrical fields; however, it is advised that normal precautions be taken to avoid applica-
tion of any voltages higher than maximum-rated voltages to this high-impedance circuit.
Reliability of operation is enhanced if unused inputs are tied to an appropriate logic volt-
age level (e.g., either GND or V
CC
).
Figure 5.
Clock Input Timing Diagram
Note:
Timing measurements are referenced to and from a low voltage of 0.8V and a high volt-
age of 2.0V, unless otherwise noted. The voltage swing through this range should start
outside and pass through the range such that the rise or fall will be linear between 0.8V
and 2.0V.
Power Considerations
The average chip-junction temperature, T
J,
in
°
C can be obtained from:
T
J
= T
A
+ (P
D
·
θ
JA
)
T
A
= Ambient Temperature,
°
C
θ
JA
= Package Thermal Resistance, Junction-to-Ambient,
°
C/W
P
D
= P
INT
+ P
I/O
P
INT
= I
CC
· V
CC
, Watts — Chip Internal Power
P
I/O
= Power Dissipation on Input and Output Pins — User Determined
For most applications P
I/O
< P
INT
and can be neglected.
An approximate relationship between P
D
and T
J
(if P
I/O
is neglected) is:
P
D
= K + (T
J
+ 273)
Solving equations (1) and (2) for K gives:
(1)
(2)
K = P
D
· (T
A
+ 273) +
θ
JA
· P
D
where K is a constant pertaining to the particular part K can be determined from equa-
tion
(3)
by measuring P
D
(at equilibrium) for a known T
A
. Using this value of K, the
values of P
D
and T
J
can be obtained by solving equations
(1)
and
(2)
iterativley for any
value of T
A
.
2
(3)
Table 4.
Thermal Characteristics at 25
°
C
Package
Symbol
Parameter
Value
Unit
PGA 114
θ
JA
Thermal Resistance - Ceramic Junction to Ambient
26
°
C/W
°
C/W
°
C/W
°
C/W
θ
JC
Thermal Resistance - Ceramic Junction to Case
5
CQFP 132
θ
JA
Thermal Resistance - Ceramic Junction to Ambient
34
θ
JC
Thermal Resistance - Ceramic Junction to Case
2
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