參數(shù)資料
型號: TS3V555I
廠商: 意法半導(dǎo)體
英文描述: 3V LOW POWER SINGLE TIMERS
中文描述: 3V的低功耗單定時器
文件頁數(shù): 5/8頁
文件大小: 74K
代理商: TS3V555I
APPLICATION INFORMATION
MONOSTABLE OPERATION
In the monostable mode,the timer functions as a
one-shot. Referring to figure 2 the externalcapaci-
tor is initially held dischargedby atransistor inside
the timer.
V
CC
Reset
Trigger
Out
3
2
4
8
7
6
5
1
R
C
Control Voltage
0.01 F
TS3V555
Figure2
CAPACITOR VOLTAGE = 2.0V/div
R =9.1k , C = 0.01 F , RL
t = 0.1 ms /div
INPUT = 2.0V/div
OUTPUT VOLTAGE = 5.0V/div
Figure 3
TYPICAL CHARACTERISTICS
Figure 1 :
Supply Current (each timer)
versus supply voltage
.
CC
SUPPLYVOLTAGE, V
(V)
C
S
(
μ
300
200
100
0
4
8
12
16
Thecircuittriggers onanegative-goinginputsignal
whenthelevelreaches1/3V
CC
. Oncetriggered,the
circuit remains in this state until the set time has
elapsed,even if it is triggered again during this
interval. The duration of the output HIGH state is
given by t = 1.1 R x C.
Noticethat since thechargerate and thethreshold
level of the comparator are both directly propor-
tional to supplyvoltage, the timing interval is inde-
pendent of supply. Applying a negative pulse
simultaneouslytotheResetterminal(pin4)andthe
Trigger terminal (pin 2) during the timing cycle
discharges the external capacitor and causes the
cycle to startover. The timing cycle now startson
thepositiveedgeoftheresetpulse.Duringthetime
the reset pulseis applied,the output is driven toits
LOW state.
When a negative trigger pulse is applied to pin 2,
the flip-flop is set, releasingthe shortcircuit across
theexternalcapacitoranddrivingtheoutputHIGH.
The voltage across the capacitor increases expo-
nentiallywith the time constant
τ
= R x C.
When the voltageacross the capacitor equals 2/3
V
CC
, thecomparator resets the flip-flop whichthen
discharges the capacitor rapidly and drives the
output to its LOWstate.
Figure 3 showsthe actualwaveforms generatedin
this mode of operation.
When Reset is not used, it should be tied high to
avoid any possible or false triggering.
TS3V555
5/8
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